Abstract: A slurry spraying mask includes a holding portion and a mask portion. The holding portion includes a holding portion opening. The mask portion includes a first layer and a second layer. The first layer includes a first tapered structure, the second layer includes a second tapered structure. The first tapered structure and the second tapered structure are arranged coaxially. A gap exists between the first layer and the second layer. The apex of the first tapered structure includes a first aperture, the apex of the second tapered structure includes a second aperture, and the second aperture is overlapped with the first aperture. The apex of the second tapered structure passes through the holding portion opening such that the mask portion is localized to the holding portion.

Abstract: The invention relates to a probe card structure, which comprises printed circuit board structure with a first through hole, a center stiffener with a second through hole, a first probe head module with a first through hole set and a plurality of first probe pins, and a second probe head module provided with a plurality of second probe pins. The first probe head module and the second probe head module are respectively arranged on a lower surface and an upper surface of the printed circuit board structure, wherein those first probe pins are set on a periphery of an opening of the first through hole set; and a portion of the second probe head module penetrating the first through hole, the second through hole, and the first through hole set. The first and second probe head module integrated together can be utilized for 3D IC testing.

Abstract: A chemical vapor deposition apparatus comprises a ballast gas source and a mass flow controller, wherein the ballast gas source is arranged at an upstream side of a separating device, and the pressure in a reaction chamber is controlled by a flow rate of the ballast gas. Since the space between the reaction chamber and the node connected with the ballast gas source is small, a pressure response of the reaction chamber can be speeded up.

Abstract: A test probe card structure includes a probe card and a connection circuit common plate. The probe card includes a probe substrate, A test circuit board is disposed between the probe substrate and the connection circuit common plate, The test circuit board has a lest circuit connection section attached to and electrically connected with a common circuit adaptation section of the connection circuit common plate. A circuit extension section is formed around the connection circuit common plate, which is all-channel electrically connectable between a tester and the teat circuit connection section. The connection circuit common plate serves to provide an all-channel test circuit convergence connection ability for the test circuit board so as to greatly minify the size of the test circuit board and lower the manufacturing cost of the probe card.

Abstract: A probe card structure adaptable to different test apparatuses of different specifications includes a probe card adapted to a first specification, a reinforcement member adapted to a second specification and a specification conversion interface unit disposed between the probe card and the reinforcement member. The probe card without the specification conversion interface unit can be directly mounted on a test apparatus of the first specification by means of a reinforcement member of the first specification to carry out the test process. Alternatively, the specification conversion interface unit can be combined with the probe card to convert the probe card from the first specification to the second specification. Accordingly, the probe card of the second specification can be mounted on a test apparatus of the second specification by means of the reinforcement member of the second specification to carry out the test process.

Abstract: A probe card for circuit-testing comprising a testing PCB, a probe head, and a silicon interposer substrate is provided. The probe head has a plurality of probes provided with a fine pitch arrangement and held inside. The silicon interposer substrate is used for conveying signals between said probes and said test PCB. The interconnection of said silicon interposer substrate is formed by utilizing the through-silicon via process. A plurality of upper terminals and a plurality of lower terminals are respectively array-arranged on the top surface and the bottom surface of said silicon interposer substrate. The pitch between the upper terminals is larger than the pitch between the lower terminals and the pitch between adjacent lower terminals is equal to the fine pitch of the arrangement of probes.

Abstract: An optoelectronic component with three-dimension quantum well structure and a method for producing the same are provided, wherein the optoelectronic component comprises a substrate, a first semiconductor layer, a transition layer, and a quantum well structure. The first semiconductor layer is disposed on the substrate. The transition layer is grown on the first semiconductor layer, contains a first nitride compound semiconductor material, and has at least a texture, wherein the texture has at least a first protrusion with at least an inclined facet, at least a first trench with at least an inclined facet and at least a shoulder facet connected between the inclined facets. The quantum well structure is grown on the texture and shaped by the protrusion, the trench and the shoulder facet.

Abstract: An electrode structure adapted for high applied voltage is provided, which comprises a conductive plate substrate and a covering layer disposed thereon such that a covering percentage of the covering layer over the conductive plate substrate is more than 50%. Since area of the conductive plate substrate covered by the covering layer is larger than the area exposed, the possibility of arcing is reduced and the breakdown voltage applied to the electrode structure may be increased.

Abstract: An upper electrode for use in a plasma processing chamber is provided, which includes a center segment and a plurality of outer segments. The outer segments are attached to the center segment to adjust the area of the overall electrode. Gas distribution holes may be selectively formed on the center and outer segments, or both. By adding or removing the outer segments and stacking layers, the dimension of the electrode, the area of gas spurting region and the thickness of the provided upper electrode may be adjusted.

Abstract: An optoelectronic component with three-dimension quantum well structure and a method for producing the same are provided, wherein the optoelectronic component comprises a substrate, a first semiconductor layer, a transition layer, and a quantum well structure. The first semiconductor layer is disposed on the substrate. The transition layer is grown on the first semiconductor layer, contains a first nitride compound semiconductor material, and has at least a texture, wherein the texture has at least a first protrusion with at least an inclined facet, at least a first trench with at least an inclined facet and at least a shoulder facet connected between the inclined facets. The quantum well structure is grown on the texture and shaped by the protrusion, the trench and the shoulder facet.

Abstract: Ion Implantation is used to form the memristor material and electrode structure with memristance. First, numerous electron-rich element atoms are implanted into a layer made of transition metal or non-metal. Then, a treating process (such as annealing) is proceeded to expel some electron-rich element atoms away the layer. After that, some electron-rich element vacancy rich regions are formed inside the layer, and then a memristor material is formed. Significantly, the usage of ion implantation can precisely control and flexibly adjust the distribution of the implanted atoms, and then both the amount and distribution of these depleted regions can be effectively adjusted. Hence, the quality of the memristor material is improved.