Abstract: A voltage divider suppresses noise in a voltage divider output by filtering the voltages at the gate terminals of the transistors that comprise a voltage divider. In one embodiment of the present invention, a voltage divider includes a PFET transistor coupled between a voltage VDD and the voltage divider output, and an NFET transistor coupled between a voltage VSS and the voltage divider output, with a resistor-capacitor (RC) filter provided at each gate terminal of each of the transistors. In a second embodiment, the RC filter is fabricated using only transistors. In both embodiments, noise is filtered out at the gate terminal of the transistors, thereby eliminating noise in the resulting voltage divider output. Accordingly, a capacitor is not required between the voltage divider output and VSS, as in the prior art.

Abstract: An efficient and economical method for fabricating field emitter tips within a layered substrate. The layered substrate is patterned using standard photolithographic techniques and etched to form a rectangular or cylindrical column on top of the substrate composed of conductive and non-conductive layers. The layered substrate is then exposed to an anisotropic etching medium which removes the column to produce a well through the conductive and non-conductive layers and which produces a conical or pyramid-shaped field emitter tip within the silicon substrate directly below the well. Finally, a pull-back etch is used to remove dielectric material from the walls of the well. In an optional step, a thin metal coating may be sputtered onto the surface of the silicon-based field emitter tip.

Abstract: Process for control and management of an Intranet network by means of a Web browser, comprising the steps of:

Abstract: A graphics processor is disclosed having two processing units and two dual-port RAMs for passing data between the processing units. The hardware is configured to process two graphics primitives simultaneously in a first mode, and to use both processing units simultaneously to process a single primitive in a second mode. One of the dual-port RAMs may function as a FIFO buffer in the second mode. A method for processing graphics primitives is disclosed in which one processing unit generates a set of intermediate results for a first primitive and stores them in a first RAM, and then generates a set of intermediate results for a second primitive and stores them in a second RAM while another processing unit reads the first RAM and completes calculations for the first primitive. Afterwards, the second processing unit reads the second RAM and completes calculations for the second primitive.

Abstract: A common dictionary definition of a "diode" is "any electronic device that restricts current flow chiefly to one direction." This definition covers not only the conventional two lead PN junction semiconductor device presently known in the prior art (referred to herein as a "conventional diode") but also the electronic device of this invention (referred to herein as a "low power diode"). A low power diode has a comparator for comparing the voltage present at the anode and cathode of the diode. When the comparator determines that the voltage present at the anode of the low power diode equals or exceeds the voltage present at the cathode of the low power diode by a predetermined forward voltage, a signal is generated. This signal turns on a transistor acting as a switch, which in turn electronically connects the anode and the cathode of the low power diode together. Unlike conventional diodes that have a forward voltage (dependent on the physical silicon junction property of the diode) of approximately 0.