Abstract: A circuit topology useable in a battery impedance tester to latch a source current to a constant magnitude includes an inductor, a comparator, a driver and a storage capacitor. The inductor is connected in series with a current path between a source and a load. The inductor produces a voltage drop that changes with current drawn by the load. Responsive to the voltage drop, the driver provides the load with current supplied from the storage capacitor. The current provided by the driver returns the source current to the constant magnitude.

Abstract: Adaptive clock generator including a master clock. A control means detects the current operating mode and, in response, provides a corresponding integer output N. A programmable pulse generator provides an output clock signal comprising a "high" pulse having a predetermined width followed by a "low" pulse having a width of N master clock periods. A dithered clock signal may be provided when the control means provides an integer output N selected from a set of integer values. Preferably, N is selected in a random or pseudo-random manner.

Abstract: Information representing the state of switches carried on a pointing device handle is carried to an associated computer via a capacitive coupling technique.

Abstract: A heater array for an ink jet printhead includes an insulating substrate, which can be a layer of ceramic, flexible plastic, insulated flexible metal, polysilicon, or single crystalline silicon. A first material layer is deposited atop the insulating substrate and patterned in parallel stripes. A first insulating layer is deposited atop the first material layer and patterned with contact windows above the first material layer in corresponding desired heating locations, usually in a symmetrical grid. A second material layer is deposited atop the first insulating layer and pattern in parallel stripes orthogonal to those in the first material layer. The first and second material layers are in physical and electrical contact with each other through the contact windows in the first insulating layer to form a resistive diode junction at each desired heating location. The entire surface of the heating array is covered with a second insulating layer, with contacts provided to the first and second material layers.

Abstract: A high efficiency power supply for producing two regulated output voltages (i.e. 3.3 and 5 volts) from an unregulated input voltage. The supply includes a 4-15 volt battery pack, a first (5.0 volt) output, a second (3.3 volt) output, and a ground. The positive terminal of the battery is connected directly to the second output. The 3.3 volt differential with ground is maintained by a voltage regulator that couples the negative terminal of the battery pack to ground (i.e. ground floats relative to the battery). A second voltage regulator couples the positive terminal of the battery pack to the first output, and maintains this first output at 5.0 volts relative to ground. This latter regulator is capable of boost operation, permitting a 5.0 volt output to be maintained even if the battery pack voltage is less than this value. Neither regulator includes a transformer, making the supply particularly well suited for use in miniaturized equipment, such as palmtop computers.

Abstract: The accumulator regulates changes in the back pressure of an ink-jet pen reservoir so that ink does not leak from the pen print head and so that the print head is able to completely empty the reservoir of ink. The accumulator includes a flexible bag that is mounted to a flat curved spring. The elasticity of the spring tends to contract the bag as the bag expands in response to back pressure reduction in the reservoir.

Abstract: An ECG recorder and playback unit which includes software-implemented digital signal processing filters which compensate for phase and magnitude distortion occurring when an ECG signal is recorded on a Holter recorder and played back. This permits "tuning" a recorder and playback unit which may be unrelated, as when made by different manufacturers. An impulse or step signal is recorded and played back to provide a system frequency response measurement. Coefficients for a digital correction filter are derived from the discrete Fourier transform of the impulse or step response and a desired system response. When recorded ECG data is played back, it is filtered on a substantially real-time basis with the digital correction filter to compensate for phase and magnitude distortion. Prior to recording, the high frequencies of the ECG signal are boosted to compensate for high frequency losses inherent in the recording and playing back of ECG signals.

Abstract: A method for simultaneously displaying images of different resolutions on a single raster scan video monitor begins with the step of storing lower resolution text and graphics data in a first memory. The data in the first memory is used to generate a first video frame having N1 pixels per line. A first video data stream is generated from the first memory at a first rate corresponding generally to the bandwidth of the video monitor. Higher resolution biological waveform data is stored in a second memory. The data in the second memory represents a second video frame having N2 pixels per line. If desired, the second memory can include data for stationary and scrolling high resolution images. A second video data stream is generated from the second memory at a second rate, which is faster than the first rate. The ratio of the second rate divided by the first rate is approximately equal to N2 divided by N1.

Abstract: A solid state relay, suitable for use in a defibrillator or other high voltage application, is disclosed. Upon activation by a switch, the solid state relay switches power from a high voltage power source, such as a capacitor, to a load, such as a patient undergoing defibrillation. The solid state relay has a group of at least two relay sections that share the voltage load such that no one relay section experiences an overvoltage condition due to the parametric variations of each relay section. Each relay section contains a subsection responsible for balancing the off-state voltage between the relay sections, a subsection responsible for controlling the change of voltage over time as the switch is activated, and a subsection for controlling the change of voltage over time as the switch is deactivated. The solid state relay also contains an output section responsible for minimizing the leakage current from the relay group to the load.

Abstract: A first electronic device, such as a computer, is connected to a second electronic device, such as a printer, over a communication bus. The second electronic device has device specific integrated circuitry for performing the functions of the device, and also has pad driver circuitry. The pad driver circuitry is connected between the communication bus and the device specific integrated circuitry. The first electronic device is powered by a first voltage source, such as AC power through an on/off switch. The second electronic device is powered by a second voltage source, such as AC power through a different on/off switch. In addition to being powered by the second voltage source, the pad driver circuitry is also powered by a third voltage source, isolated from the second voltage source.

Abstract: A method is provided for assembling thermal ink-jet printheads. The method comprises: (a) providing a circuit layout comprising a first substrate, a plurality of conductive traces thereon in a pre-selected pattern, and a plurality of openings through the substrate defining ink-jet nozzles; (b) providing a die layout comprising (1) a plurality of resistors, each resistor formed on a second substrate and matched to an opening and (2) a plurality of channels formed in a barrier material and matched to a portion of the plurality of conductive traces; (c) interlocking plurality of conductive traces with the plurality of channels to align each resistor with a respective one of the openings; and (d) laminating those portions of the first substrate that contact the barrier to the barrier so as to bond the two layouts together. In one embodiment, the resistors are each formed in a well defined in a layer of the barrier material already on the substrate, which is extended to encompass the resistors.

Abstract: A defibfillator has a self healing storage capacitor connected in parallel with a safety resistor, and a microcontroller. Upon receipt of a calibration request, the microcontroller charges the capacitor to a charging voltage greater than a starting voltage, then discharges the capacitor through the safety resistor. As the capacitor is discharging, the microcontroller continuously measures the voltage across the capacitor. When the microcontroller detects that the voltage across the capacitor is less than or equal to a starting voltage, a timer in the microcontroller is started. When the microcontroller detects that the voltage across the capacitor is less than or equal to an ending voltage, the timer in the microcontroller is stopped. The microcontroller then determines an elapsed time between the time the timer was started and stopped. The microcontroller then calculates a capacitance value of the capacitor based on the starting voltage, the ending voltage, and the elapsed time.

Abstract: A high-accuracy QRS detector detects "activity" on the ECG waveform. Activity results from a steep slope of one sense followed shortly thereafter by a steep slope of the opposite sense. Low-pass filtering activity and multiplying by 2.5 yields a noise threshold. An activity peak which rises above this threshold may be a QRS complex. The detector waits three-fourths the average R to R interval after detecting a peak to allow for greater peaks to be detected. If none are, the peak is confirmed if it is either at least half the magnitude of the previous peak, or if it occurs at least three-fourths the average R to R interval after the last detected peak. This high-accuracy detector may be coupled with a fast QRS detector by providing it with the peak values of the previous three detections. The fast detector will detect if the slope is greater than three-fourths the average of the previous three detections, greater than the noise threshold, and more than 160 ms has elapsed since its last detection.

Abstract: An ECG waveform calibration method combines ECG channel calibration pulses to form combined calibration pulses. The combined channel pulses are filtered to select valid combined pulses. The selected combined pulses are correlated to the corresponding channel calibration pulses to determine valid channel calibration pulses from which a correction scale factor is derived. A valid calibration pulse is determined where a correlation between a combined calibration pulse and a corresponding channel calibration pulse is greater than a predetermined correlation value. The valid channel calibration pulses are then characterized. A set of valid channel calibration pulses is selected for each channel based on the characterization to form an average calibration pulse. The average calibration pulse is used to determine a correction scale factor for each channel which is used to scale the actual channel ECG waveform data. The method also includes a step for adjusting the intra-channel skew.

Abstract: A class of lossless data compression algorithms use a memory-based dictionary of finite size to facilitate the compression and decompression of data. To reduce the loss in data compression caused by dictionary resets, a standby dictionary is used to store a subset of encoded data entries previously stored in a current dictionary. In a second aspect of the invention, data is compressed/decompressed according to the address location of data entries contained within a dictionary built in a content addressable memory (CAM). In a third aspect of the invention, the minimum memory/high compression capacity of the standby dictionary scheme is combined with the fast single-cycle per character encoding/decoding capacity of the CAM circuit. The circuit uses multiple dictionaries within the storage locations of a CAM to reduce the amount of memory required to provide a high data compression ratio.

Abstract: A CMOS power-on reset circuit has a delay capacitor to provide a predetermined delay period. Charging and discharging of the delay capacitor is controlled by the state of a flipflop circuit. An input comparator monitors a power supply input voltage. An invalid input voltage level immediately changes the reset output signal to the invalid state and discharges the capacitor. Even after the input voltage has recovered to a valid level, recharging the capacitor is delayed until the capacitor has substantially discharged, thereby ensuring at least a predetermined delay period after the last fault condition. The delay capacitor is coupled in a feedback configuration so as to lower the threshold voltage when the delay capacitor voltage indicates to the valid state, to allow limited power supply sag, for example due to motor start-up, without resetting the circuit.

Abstract: Ink jet print quality is improved and higher pen speed permitted by a bidirectional printing protocol. According to the new protocol, each individual character to be printed is first partitioned into a leading portion and a trailing portion. The trailing portion includes all trailing edge bits. Only the leading portion is printed on a forward pass of the ink jet pen. The trailing portion is printed on a reverse pass of the pen, so that trailing edge ink drops are instead printed as leading edge ink drops. As a result, satellite ink drops are directed toward the center of the character, where they are covered by primary ink drops, thereby minimizing character edge roughness associated with exposed satellite ink drops.

Abstract: An integrated circuit for use in the printhead of an ink jet printer includes an array circuit for heating an ink reservoir to produce a pattern of ink jets, the array circuit including a plurality of resistor cells arranged into rows and columns. A corresponding number of row and column lines are coupled to the integrated circuit array for selecting and energizing the resistor cells according to the desired printing pattern. An identification circuit integrated into the same substrate as the array circuit includes one or more programmable paths, the programmable paths corresponding and coupled to each row line. The programmable paths each include the serial combination of a programmable fuse and an active device. The opposite end of the programmable paths are coupled together at a common node, which in turn is coupled to an output circuit for providing a single output signal in response to a polling of the row lines.

Abstract: A high-speed, relay for switching a high voltage signals includes a set of terminals across which the high voltage signal is applied. The relay also includes a motor having a shaft for movement between an open position and a closed position responsive to actuation of the motor. A contact plate is connected to the shaft which moves responsive to the shaft. A conductor having two contacts at distal ends is formed on the contact plate opposite the terminals such that the conductor does not contact the terminals in the open position and the conductor creates a short circuit across the terminals when in the closed position. The relay according to the invention permits the contact plate to be positioned closer to the terminals which results in a faster switching time.