Abstract: An attribute bit-state mapper to receive state decisions, each state decision including a current one-bit state and identity information, the current one-bit state corresponding to a one-bit answer from a decision network indicative of a state of an attribute of an entity of a population of entities identified by the identity information. The attribute bit-state mapper to assign each population of entities to a population data set, and to assign to each entity of a population data set coordinates with the corresponding population data set. The attribute bit-state mapper further to maintain for each population data set a current data set including, at the assigned coordinates, the current bit-state for each entity, and a past data set comprising a copy of the current data set from an earlier point in time.
Abstract: A server including request handlers each having a unique handler identifier. The server receiving client service requests, each client service request including a handler identifier, and for each client service request, selecting the request handler corresponding to the handler identifier. The selected request handler implements a predefined procedure to process the client service request including to send a handler service request to a destination server initially selected from a predetermined group of destination servers, the handler service request including a handler identifier, and to receive a response message, including response data, from the initially selected destination server in response to the handler service request.
Abstract: One example includes a machine-readable storage medium encoded with instructions. The instructions are executable by a processor of a system to cause the system to receive at least one target electrical characteristic indicating a target impedance of a passive printed circuit board (PCB) structure. The passive PCB structure is a component of a serial communication channel. The instructions are executable by the processor to cause the system to divide the passive PCB structure into a plurality of elements. Each element has an input and an output. The instructions are executable by the processor to cause the system to determine at least one parameter of each element such that an image impedance of the input and the output of each element equals the target impedance.
Abstract: One example includes a printed circuit board (PCB) structure. The PCB structure includes a first dereferenced microstrip and a first capacitor pad contacting the first dereferenced microstrip. The PCB structure includes a second dereferenced microstrip and a second capacitor pad contacting the second dereferenced microstrip. The PCB structure also includes a capacitor including a first terminal contacting the first capacitor pad and a second terminal contacting the second capacitor pad.