Patents Assigned to Hicamp Systems, Inc.
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Patent number: 8938580Abstract: Improved memory management is provided according to a Hierarchical Immutable Content Addressable Memory Processor (HICAMP) architecture. In HICAMP, physical memory is organized as two or more physical memory blocks, each physical memory block having a fixed storage capacity. An indication of which of the physical memory blocks is active at any point in time is provided. A memory controller provides a non-duplicating write capability, where data to be written to the physical memory is compared to contents of all active physical memory blocks at the time of writing, to ensure that no two active memory blocks have the same data after completion of the non-duplicating write.Type: GrantFiled: October 24, 2013Date of Patent: January 20, 2015Assignee: Hicamp Systems, Inc.Inventor: David R. Cheriton
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Publication number: 20140258777Abstract: Logging changes to a physical memory region during a logging time interval includes: detecting a write operation to the physical memory region, wherein the write operation modifies an indirect representation that corresponds to a physical data line in the physical memory region; and recording log information associated with the write operation.Type: ApplicationFiled: February 11, 2014Publication date: September 11, 2014Applicant: Hicamp Systems, Inc.Inventor: David R. Cheriton
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Publication number: 20140258660Abstract: Providing a snapshot of a physical memory region as of a specified time includes: sending, from a first processor to a second processor, a request to generate a snapshot of the physical memory region as of the specified time; and generating, using the second processor, the snapshot of the physical memory region based at least in part on a known state of the physical memory region and log information about update activity of the physical memory region.Type: ApplicationFiled: February 11, 2014Publication date: September 11, 2014Applicant: Hicamp Systems, Inc.Inventor: David R. Cheriton
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Publication number: 20140149656Abstract: Improved memory management is provided according to a Hierarchical Immutable Content Addressable Memory Processor (HICAMP) architecture. In HICAMP, physical memory is organized as two or more physical memory blocks, each physical memory block having a fixed storage capacity. An indication of which of the physical memory blocks is active at any point in time is provided. A memory controller provides a non-duplicating write capability, where data to be written to the physical memory is compared to contents of all active physical memory blocks at the time of writing, to ensure that no two active memory blocks have the same data after completion of the non-duplicating write.Type: ApplicationFiled: October 24, 2013Publication date: May 29, 2014Applicant: Hicamp Systems, Inc.Inventor: David R. Cheriton
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Patent number: 8612673Abstract: Improved memory management is provided according to a Hierarchical Immutable Content Addressable Memory Processor (HICAMP) architecture. In HICAMP, physical memory is organized as two or more physical memory blocks, each physical memory block having a fixed storage capacity. An indication of which of the physical memory blocks is active at any point in time is provided. A memory controller provides a non-duplicating write capability, where data to be written to the physical memory is compared to contents of all active physical memory blocks at the time of writing, to ensure that no two active memory blocks have the same data after completion of the non-duplicating write.Type: GrantFiled: June 26, 2012Date of Patent: December 17, 2013Assignee: Hicamp Systems, Inc.Inventor: David R. Cheriton
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Patent number: 8504791Abstract: Intercepting a requested memory operation corresponding to a conventional memory is disclosed. The requested memory operation is translated to be applied to a structured memory.Type: GrantFiled: September 27, 2012Date of Patent: August 6, 2013Assignee: Hicamp Systems, Inc.Inventors: David R. Cheriton, Alexandre Y. Solomatnikov
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Patent number: 8407428Abstract: Intercepting a requested memory operation corresponding to a conventional memory is disclosed. The requested memory operation is translated to be applied to a structured memory.Type: GrantFiled: May 20, 2010Date of Patent: March 26, 2013Assignee: Hicamp Systems, Inc.Inventors: David R. Cheriton, Alexandre Y. Solomatnikov
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Patent number: 8370458Abstract: Data transmission efficiency for structured data can be improved by representing structured data using immutable blocks. The contents of the immutable blocks can include data and/or pointers to immutable blocks. An immutable data block cannot be altered after creation of the block. When data represented as immutable blocks is transmitted from one processor to another processor, the transmitter sends block contents for blocks that have not previously been defined at the receiver, and sends block IDs (as opposed to block contents) for blocks that have previously been defined at the receiver. The systematic use of block IDs instead of block contents in transmission where possible can significantly reduce transmission bandwidth requirements.Type: GrantFiled: December 19, 2008Date of Patent: February 5, 2013Assignee: Hicamp Systems, Inc.Inventor: David R. Cheriton
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Publication number: 20130031331Abstract: Intercepting a requested memory operation corresponding to a conventional memory is disclosed. The requested memory operation is translated to be applied to a structured memory.Type: ApplicationFiled: September 27, 2012Publication date: January 31, 2013Applicant: HICAMP SYSTEMS, INC.Inventor: HICAMP SYSTEMS, INC.
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Publication number: 20130024645Abstract: Intercepting a requested memory operation corresponding to a conventional memory is disclosed. The requested memory operation is translated to be applied to a structured memory.Type: ApplicationFiled: May 20, 2010Publication date: January 24, 2013Applicant: HICAMP SYSTEMS, INC.Inventors: David R. Cheriton, Alexandre Y. Solomatnikov
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Patent number: 8316276Abstract: An Upper Layer Protocol (ULP) offload engine system, method and associated data structure are provided for performing protocol offloads without requiring a Transmission Control Protocol (TCP) offload engine (TOE). In an embodiment, the ULP offload engine provides Internet Small Computer System Interface (iSCSI) offload services.Type: GrantFiled: June 12, 2008Date of Patent: November 20, 2012Assignee: Hicamp Systems, Inc.Inventor: Alexander Aizman
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Publication number: 20120265931Abstract: Improved memory management is provided according to a Hierarchical Immutable Content Addressable Memory Processor (HICAMP) architecture. In HICAMP, physical memory is organized as two or more physical memory blocks, each physical memory block having a fixed storage capacity. An indication of which of the physical memory blocks is active at any point in time is provided. A memory controller provides a non-duplicating write capability, where data to be written to the physical memory is compared to contents of all active physical memory blocks at the time of writing, to ensure that no two active memory blocks have the same data after completion of the non-duplicating write.Type: ApplicationFiled: June 26, 2012Publication date: October 18, 2012Applicant: HICAMP SYSTEMS, INC.Inventor: David R. Cheriton
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Patent number: 8230168Abstract: Improved memory management is provided according to a Hierarchical Immutable Content Addressable Memory Processor (HICAMP) architecture. In HICAMP, physical memory is organized as two or more physical memory blocks, each physical memory block having a fixed storage capacity. An indication of which of the physical memory blocks is active at any point in time is provided. A memory controller provides a non-duplicating write capability, where data to be written to the physical memory is compared to contents of all active physical memory blocks at the time of writing, to ensure that no two active memory blocks have the same data after completion of the non-duplicating write.Type: GrantFiled: October 11, 2011Date of Patent: July 24, 2012Assignee: Hicamp Systems, Inc.Inventor: David R. Cheriton
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Publication number: 20120096221Abstract: Improved memory management is provided according to a Hierarchical Immutable Content Addressable Memory Processor (HICAMP) architecture. In HICAMP, physical memory is organized as two or more physical memory blocks, each physical memory block having a fixed storage capacity. An indication of which of the physical memory blocks is active at any point in time is provided. A memory controller provides a non-duplicating write capability, where data to be written to the physical memory is compared to contents of all active physical memory blocks at the time of writing, to ensure that no two active memory blocks have the same data after completion of the non-duplicating write.Type: ApplicationFiled: October 11, 2011Publication date: April 19, 2012Applicant: Hicamp Systems, Inc.Inventor: David R. Cheriton
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Patent number: 8065476Abstract: Improved memory management is provided according to a Hierarchical Immutable Content Addressable Memory Processor (HICAMP) architecture. In HICAMP, physical memory is organized as two or more physical memory blocks, each physical memory block having a fixed storage capacity. An indication of which of the physical memory blocks is active at any point in time is provided. A memory controller provides a non-duplicating write capability, where data to be written to the physical memory is compared to contents of all active physical memory blocks at the time of writing, to ensure that no two active memory blocks have the same data after completion of the non-duplicating write.Type: GrantFiled: December 17, 2009Date of Patent: November 22, 2011Assignee: Hicamp Systems, Inc.Inventor: David R. Cheriton
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Publication number: 20110010347Abstract: Loading data from a computer memory system is disclosed. A memory system is provided, wherein some or all data stored in the memory system is organized as one or more pointer-linked data structures. One or more iterator registers are provided. A first pointer chain is loaded, having two or more pointers leading to a first element of a selected pointer-linked data structure to a selected iterator register. A second pointer chain is loaded, having two or more pointers leading to a second element of the selected pointer-linked data structure to the selected iterator register. The loading of the second pointer chain reuses portions of the first pointer chain that are common with the second pointer chain. Modifying data stored in a computer memory system is disclosed. A memory system is provided. One or more iterator registers are provided, wherein the iterator registers each include two or more pointer fields for storing two or more pointers that form a pointer chain leading to a data element.Type: ApplicationFiled: July 23, 2010Publication date: January 13, 2011Applicant: Hicamp Systems, Inc.Inventors: David R. Cheriton, Amin Firoozshahian, Alexandre Y. Solomatnikov
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Patent number: 7650460Abstract: Improved memory management is provided according to a Hierarchical Immutable Content Addressable Memory Processor (HICAMP) architecture. In HICAMP, physical memory is organized as two or more physical memory blocks, each physical memory block having a fixed storage capacity. An indication of which of the physical memory blocks is active at any point in time is provided. A memory controller provides a non-duplicating write capability, where data to be written to the physical memory is compared to contents of all active physical memory blocks at the time of writing, to ensure that no two active memory blocks have the same data after completion of the non-duplicating write.Type: GrantFiled: January 25, 2008Date of Patent: January 19, 2010Assignee: Hicamp Systems, Inc.Inventor: David R. Cheriton