Abstract: A re-configurable bank of DC-DC converters has many channels, each with a DC-DC converter and a controller that senses the channel's output voltage and current to adjust a duty cycle of switch signals to the DC-DC converter. A serial bus connects to all controllers and writes digital voltage and current control targets into each controller. The controller has Digital-to-Analog Converters (DACs) that convert the targets to analog voltages that are compared to sensed output voltage and current. The comparison results are compared to a sawtooth wave to generate pulses of the switch signals that have a duty cycle adjusted for the target comparisons. In combined mode, a primary channel's controller generates switch signals for secondary channels having outputs shorted to the primary channel. Secondary channels have a mux to select switch signals from the primary controller during combined mode, and from the secondary controller during separated mode.

Abstract: A modulator spreads the spectrum of a generated clock to reduce Electro-Magnetic Interference (EMI). A capacitor is charged by a variable current to generate a ramp voltage that is compared to a reference to end a clock cycle and discharge the capacitor. An up-down counter drives a Digital-to-Analog Converter (DAC) that controls the variable charging current to provide triangle modulation. A smaller offset current is added or subtracted for cubic modulation when the up-down counter reaches its minimum count. A frequency divider that clocks the up-down counter also clocks a Linear-Feedback Shift-Register (LFSR) to that controls pseudo-random current sources that further modulate variable current and frequency. The LFSR is clocked with the up-down counter to modulate each frequency step, or only at the minimum count to randomly modulate at the minimum frequency. Binary-weighted bits from the up-down counter to the DAC are swapped to modulate the frequency step size.