Abstract: An array based application specific integrated circuit includes four application specific integrated circuits on one die. Each of the four application specific integrated circuits functions in a certain mode. Only one of the four application specific integrated circuits is activated at any time. Activation of a mode is determined by the configuration of mode selection circuitry of the array based application specific integrated circuit. The four modes are not interrelated, and the four application specific integrated circuits do not share transistors in the array based application specific integrated circuit. The four application specific integrated circuits may share input/output pins of the array based application specific integrated circuit.
Abstract: A microprogrammable processor is capable of accessing unused portions of a control store as fast data memory. The microprogrammable processor includes a microsequencer that accesses microinstructions from either an internal control store or an external control store. These microinstructions control the operation of the microprogrammable processor. When the microsequencer accesses instructions from an internal control store, the microprogrammable processor is operable to access external control store as fast data memory.
Abstract: A memory interface chip with rapid search capability incorporates multiple registers to latch data from a memory under control of a microprocessor and to permit comparison of search strings and masking or special comparison characters provided by a processor with data from the memory. The memory interface chip includes a first register having a first plurality of storage locations for storing a target search string, and a second register having a second plurality of storage locations for receiving data in parallel from the memory. A plurality of comparators connected to the registers compares the search target string to data from the memory. Each column of comparators feeds forward a positive compare result from any comparator in the column to an AND gate receiving the output of the next sequential comparator in the next column of comparators, thereby allowing confirmation of the positive comparisons of the target string by the comparator columns.
Abstract: A microprogrammable processor is capable of accessing unused portions of a control store as fast data memory. The microprogrammable processor includes a microsequencer that accesses microinstructions from either an internal control store or an external control store. These microinstructions control the operation of the microprogrammable processor. When the microsequencer accesses instructions from an internal control store, the microprogrammable processor is operable to access external control store as fast data memory.
Abstract: An improved design verification system for testing VLSI chips including an outer chassis with access hatches for servicing, removing and installing test circuitry. The chassis additionally incorporates an optics aperture and a manipulator interface which are used in conjunction with other test equipment such as wafer probers. A device-under-test (DUT) board for electromechanically positioning an integrated circuit device is electrically connected directly to a plurality of pin electronics (PE) boards through extended DUT board edge connectors. In addition to the direct DUT/PE boards connection, the PE boards are also directly connected to the backplane assembly through data edge connectors and power edge connectors.
Type:
Grant
Filed:
June 9, 1989
Date of Patent:
March 19, 1991
Assignee:
Hilevel Technology, Inc.
Inventors:
Bjorn Dahlberg, Charles H. Schwar, Mauro V. Tegethoff
Abstract: A fixture for clamping an integrated circuit chip testing board having a plurality of contact points to a testing platform having a plurality of corresponding protruding metal pins. The fixture includes a hinged cover with a latch for automatically aligning the testing board parallel to the testing platform and a means for automatically disabling the power supplied to the testing platform when the cover is opened and enabling the power when the cover is closed. The automatic alignment of the testing board parallel to the testing platform assures that the electrical connections between the contact points and their corresponding metal pins are substantially identical to thereby reduce testing errors caused by nonuniformity in the electrical interconnections.