Abstract: An image sensor includes a substrate, multiple pixel regions separately disposed in the substrate, and a pick up region including a doping region and a pick up plug obliquely disposed on the doping region and directly contacting the doping region.

Abstract: A method to read out pixels includes reading a first pixel by resetting a first photodetector, integrating the first photodetector after resetting the first photodetector, resetting a first floating diffusion node coupled to the first photodetector and a second floating diffusion node coupled to a second photodetector, transferring charge from the first photodetector to the first floating diffusion node, comparing a first signal at the first floating diffusion node and a second signal at the second floating diffusion node and generating a first signal to latch a first counter value when the first signal is less than the second signal, incrementing the first signal and decrementing the second signal, and comparing the first signal and the second signal and generating a second signal to latch a second counter value when the first signal is greater than the second signal, wherein the difference between the second counter value and the first counter value indicates a first pixel level.

Abstract: A semiconductor structure for suppressing hot clusters includes a substrate of a first dopant concentration, an epitaxial layer having a second dopant concentration smaller than the first dopant concentration and directly disposed on the substrate, a dopant gradient region disposed in the epitaxial layer and having a gradient decreasing from the substrate to the epitaxial layer, a shallow trench isolation disposed between a first element region and a second element region, and a shallow trench doping region surrounding the shallow trench isolation and near the dopant gradient region to suppress a hot cluster formed by the first element region to jeopardize the second element region.

Abstract: A process of forming a back side illumination (BSI) image sensor is disclosed. An n-type implant is formed in a semiconductor substrate, and a p-type implant region, surrounding n-type in each pixel, is formed in the n-type implant such that in cross sectional view an n-type implant region is sandwiched between the two p-type implant regions. A transfer gate is formed on the semiconductor substrate such that the transfer gate entirely covers the n-type implant region and at least partially covers each of the p-type implant regions. A floating diffusion is formed in one of the p-type implant regions.

Abstract: A pixel array comprises at least one long exposure pixel, short exposure pixel, and a control circuit. The long exposure pixel comprises a first photodiode to generate charges, a first image signal generating module for generating a first image sensing signal; and a first transfer switch device for passing the charges to the first image signal generating module via a first transfer control signal. The control circuit sets the first transfer control signal to be a first predetermined control voltage when the long exposure pixel is in an long exposure phase, and then sets the first transfer control signal to be a second predetermined control voltage when the short exposure pixel is in a short exposure phase.

Abstract: An image sensor includes a substrate, multiple pixel regions separately disposed in the substrate, and a pickup region including a doping region and a pick up plug obliquely disposed on the doping region and directly contacting the doping region.

Abstract: A signal processing circuit including an amplifying circuit, a control circuit, and a sample-and-hold circuit is provided. The amplifying circuit receives an analog input signal and outputs a first analog signal by amplifying the analog input signal. The control circuit outputs a control signal according to the analog input signal. The sample-and-hold circuit is coupled to the amplifying circuit and the control circuit to selectively adjust a gain factor of the sample-and-hold circuit according to the control signal, thereby outputting a second analog signal according to the first analog signal and the gain factor.

Abstract: The present invention provides an image sensor and a fabricating method of the image sensor. The image sensor comprises: a first type epitaxial layer, a photodiode region, a first type well region, a gate region of a source follower transistor, and a first type implant isolation region. The first type well region is formed within the first type epitaxial layer with a first horizontal distance to the photodiode region and a vertical distance to a surface of the first type epitaxial layer. The gate region of a source follower transistor is formed on the surface of the first type epitaxial layer and above the first type well region, and has a second horizontal distance to the photodiode region. There is a distance between the first type implant isolation region and the first type well region as an anti-blooming path.

Abstract: A semiconductor structure for suppressing a hot cluster is disclosed. An isolation well region which has an extension tip extending toward a substrate is formed in an epitaxial layer disposed on the substrate are of a first conductive type. A first element region and a second element region are disposed in the epitaxial layer to sandwich the isolation well region. The extension tip and the substrate together suppresses a leak current which forms a hot cluster and flows from the first element region via the extension tip to the second element region.

Abstract: A pixel array comprises at least one long exposure pixel, short exposure pixel, and a control circuit. The long exposure pixel comprises a first photodiode to generate charges, a first image signal generating module for generating a first image sensing signal; and a first transfer switch device for passing the charges to the first image signal generating module via a first transfer control signal. The control circuit sets the first transfer control signal to be a first predetermined control voltage when the long exposure pixel is in an long exposure phase, and then sets the first transfer control signal to be a second predetermined control voltage when the short exposure pixel is in a short exposure phase.

Abstract: An image sensor includes a passive pixel sensor array and a readout circuit. The passive pixel sensor array has a plurality of pixel columns each having at least one column line. The readout circuit includes a ramp signal generating circuit, a ramp signal line and a comparing circuit. The ramp signal generating circuit is arranged for generating a ramp signal. The ramp signal line is arranged for receiving the ramp signal, wherein the ramp signal line intersects the column line without electrical connection so as to form a parasitic capacitor. The comparing circuit corresponds to the column lines, wherein during the operating cycle of the readout circuit, a pixel sensor of the passive pixel sensor array outputs a charge signal to the column line, and the comparing circuit is arranged for generating an output signal of the pixel sensor according to the ramp signal and the charge signal.

Abstract: An imaging processing circuit includes at least a pixel sensor and a processing unit. The pixel sensor includes a photo detector and a storage capacitor. The photo detector is arranged for generating a first pixel signal. The storage capacitor is arranged for storing a second pixel signal. The processing unit is coupled to the pixel sensor, and arranged for generating an updated second pixel signal during a current operating cycle of the imaging processing circuit according to the first pixel signal and the second pixel signal. The updated second pixel signal is stored in the storage capacitor before a next operating cycle of the imaging processing circuit.

Abstract: A spatial binning method for re-sampling a binned image generated by pixel binning includes at least the following steps: receiving a raw image; pixel binning the raw image to generate a binned image; and re-sampling the binned image spatially to generate a re-sampled image according to the values and positions of the pixels of the binned image. A spatial binning circuit, comprising: a binning unit for receiving a raw image to generate a binned image; and a re-sampling unit for receiving the binned image and re-sampling the pixels of the binned image according to the values and positions of the pixels of the binned image.

Abstract: The present invention provides an image sensor and a fabricating method of the image sensor. The image sensor comprises: a first type epitaxial layer, a photodiode region, a first type well region, a gate region of a source follower transistor, and a first type implant isolation region. The first type well region is formed within the first type epitaxial layer with a first horizontal distance to the photodiode region and a vertical distance to a surface of the first type epitaxial layer. The gate region of a source follower transistor is formed on the surface of the first type epitaxial layer and above the first type well region, and has a second horizontal distance to the photodiode region. There is a distance between the first type implant isolation region and the first type well region as an anti-blooming path.

Abstract: A method to read out pixels includes reading a first pixel by resetting a first photodetector, integrating the first photodetector after resetting the first photodetector, resetting a first floating diffusion node coupled to the first photodetector and a second floating diffusion node coupled to a second photodetector, transferring charge from the first photodetector to the first floating diffusion node, comparing a first signal at the first floating diffusion node and a second signal at the second floating diffusion node and generating a first signal to latch a first counter value when the first signal is less than the second signal, incrementing the first signal and decrementing the second signal, and comparing the first signal and the second signal and generating a second signal to latch a second counter value when the first signal is greater than the second signal, wherein the difference between the second counter value and the first counter value indicates a first pixel level.

Abstract: A correlated double sampling apparatus includes a first processing unit and a second processing unit. The first processing unit is arranged for receiving a reset signal, a data signal, and a predetermined signal; obtaining a reset level of the reset signal and a first data level of the data signal in a first operation mode; and obtaining a second data level of the data signal, and comparing the second data level with the predetermined signal to generate a detection result in a second operation mode. The second processing unit is arranged for storing the reset level and the first data level in the first operation mode, and selectively correcting an output signal according to the detection result in the second operation mode, wherein the output signal is determined according to a level difference between the reset level and the first data level.

Abstract: A semiconductor structure for suppressing hot clusters includes a substrate of a first dopant concentration, an epitaxial layer having a second dopant concentration smaller than the first dopant concentration and directly disposed on the substrate, a dopant gradient region disposed in the epitaxial layer and having a gradient decreasing from the substrate to the epitaxial layer, a shallow trench isolation disposed between a first element region and a second element region, and a shallow trench doping region surrounding the shallow trench isolation and near the dopant gradient region to suppress a hot cluster formed by the first element region to jeopardize the second element region.

Abstract: An amplifying/digitizing circuit with a signal amplifying capability and a comparator capability is provided. The amplifying/digitizing circuit includes an amplifier having an input end and an output end, and a control circuit. The control circuit is coupled to the input end and the output end of the amplifier. When the amplifying/digitizing circuit is operated under an amplifying mode, the control circuit has a first configuration to receive a first input signal and makes the amplifier generate an output voltage at the output end according to the first input signal and an amplification factor. When the amplifying/digitizing circuit is operated under an ADC mode, the control circuit has a second configuration to receive a second input signal and makes the amplifier generate a comparison result according to the second input signal and the output voltage.

Abstract: A method to read out pixels includes reading a first pixel by resetting a first photodetector, integrating the first photodetector after resetting the first photodetector, resetting a first floating diffusion node coupled to the first photodetector and a second floating diffusion node coupled to a second photodetector, transferring charge from the first photodetector to the first floating diffusion node, comparing a first signal at the first floating diffusion node and a second signal at the second floating diffusion node and generating a first signal to latch a first counter value when the first signal is less than the second signal, incrementing the first signal and decrementing the second signal, and comparing the first signal and the second signal and generating a second signal to latch a second counter value when the first signal is greater than the second signal, wherein the difference between the second counter value and the first counter value indicates a first pixel level.

Abstract: An image sensor includes: a substrate, at least a pixel, and at least a light shield is provided. Wherein the pixel includes a photodiode and at least a transistor, and the transistor is connected to a metal line via a contact. The light shield is positioned around at least one side of the pixel, wherein the light shield is made while forming the contact.