Patents Assigned to Hiroaki Terada
  • Distributed processing device for a digital filter
    Patent number: 5524028
    Abstract: A horizontal synchronizing signal is counted by a binary counter. A first switch is switched in response to the count value, whereby signal data is classified. A sampling clock signal is counted by a binary counter. An output of the first switch is switched by second and third switches in response to the count value, whereby the data input rate of signal data is reduced. Each classified signal is subjected to filtering by a two-dimensional FIR digital filter.
    Type: Grant
    Filed: September 3, 1993
    Date of Patent: June 4, 1996
    Assignees: Hiroaki Terada, Mistubishi Denki Kabushiki Kaisha, Sharp Kabushiki Kaisha
    Inventors: Hiroaki Terada, Makoto Iwata, Masayuki Mizuno