Abstract: One or more combinations of an operating data processing machine and a backup data processing machine are connected together to enable backup switching wherein the backup machine takes over the data processing from the operating machine when a failure occurs in the operating machine. In particular, each of the operating and backup machines is connected to one or several system resources, such as data storage or data output devices. The operating processor exclusively occupies the system resources, and when a failure occurs the operating processor is disconnected therefrom. A disconnection completion notice is sent to the backup processor, which then begins to exclusively occupy the system resources for performing ongoing data processing that would have been performed by the operating processor had the failure not occurred. When a failure occurs with the operating processor, the data being processed and the data concerning the failure are dumped to an auxiliary memory to facilitate analysis of the failure.

Abstract: A frequency-hopped mobile communication system is disclosed, in which a mobile wireless station automatically becomes a base station in accordance with the surrounding conditions, thereby automatically reconfiguring a communication network. A control frame is generated by at least one master station, and frequencies are hopped by a plurality of slave stations in accordance with the control frame. Each slave station switches the master thereof to be tracked, in accordance with the receiving conditions of the control frame and the relation between the control frame received from the master station and the status of the slave station and decides in which mode, master station or slave station, the slave station is to operate. The cells are thus automatically reconfigured.

Abstract: In a wireless LAN system, each wireless terminal device determines whether or not the wireless terminal device has entered into a wireless LAN domain established by a base station, and if it has entered, transmits an entry terminal identification information update control frame including identification information of its own device to the base station at a predetermined time interval. The base station receives the entry terminal identification information update control frame from the wireless terminal device, stores in a storage the identification information of the wireless terminal device entered into the wireless LAN domain established by its own base station, and when it receives an information frame from a wired transmission line connected to its own base station, relay-transmits only the information frame to the wireless terminal device having the identification information thereof stored in the storage by referring the information stored in the storage.

Abstract: A data transfer control system in a data transfer apparatus including a plurality of data processing units having different data transfer speeds and a temporary holding circuit provided between the data processing units for temporarily holding data transferred between the data processing units. The data transfer apparatus sends a transfer request for data corresponding to a data storage capacity of the temporary holding circuit of the data transfer apparatus to the data processing unit on the side of sending data and sends a transfer request for data corresponding to the data storage capacity of the temporary holding circuit after an elapse of a delivering time of data to an information processing unit on the data transferred side of the temporary holding circuit from the time the data transfer request is sent until the requested data from the data processing unit on the data sending side reaches the temporary holding circuit of the data transfer apparatus.

Abstract: A multiprocessor bridge construction allows ports that are operable under a spanning tree protocol to coexist with ports that are inoperable under the spanning tree protocol, thus making it possible to improve the frame-repeating capability of the bridge, to equip the bridge with a large number of ports, and to divide the spanning tree topology into a plurality of portions to be managed.

Abstract: A system for producing parts/substrate assemblies each of which includes a substrate such as a ceramic substrate and a plurality of parts such as LSIs mounted on the substrate. After the LSIs for one lot of the production have been checked for excess or deficiency, etc. by a collating device, they are formed with solder bumps and then inspected. The LSIs are automatically arranged on empty work pallets as parts kits by a kit setting apparatus, and the work pallets on each of which the corresponding LSIs have been arranged as the parts kit are moved into a stocker. A host computer gives a command for mounting the LSIs on the ceramic substrate on which they can be mounted, on the basis of information indicating the stocked pallet and information indicating the progress of the ceramic substrate. An LSI mounting apparatus reads the serial No. of the introduced ceramic substrate, and requests the stocker to deliver the work pallet on which the associated LSIs have been arranged as the parts kit.

Abstract: Information is recorded on a rewritable optical disk apparatus in accordance with the second generation 5 inch rewritable-type optical disks standards that provide for reusing once-defective user blocks. Such disks have a user data recording region, a replacement recording region and a replacement control information recording region in which a table of information linking defective blocks in the user data recording region with replacement blocks in the replacement recording region is stored. Continuity of the distribution of the replacement recording blocks is maintained by treatment of replacement blocks that become unnecessary. Unnecessary replacement blocks are ones that are not used for storing data because of the subsequent successful recording of data in once defective user blocks to which the replacement blocks were previously linked.

Abstract: A data processing system capable of simultaneously processing a plurality of partial purge requests stored in a purge address stack and of reducing the effective time necessary for carrying out a partial purge process for the partial purging of an address translation lookaside buffer is disclosed. The data processing system comprises a purge address stack (106) having a plurality of registers (106a to 106d) for storing a plurality of partial purge requests, a plurality of comparators (109a to 109d) associated with the registers of the purge address stack respectively and functioning for both gaining normal access to an address translation lookaside buffer and carrying out a partial purge process, and a comparator (110) to be used when an address translator (107) operates.

Abstract: User authentication information for network of a user and a name of a server to be accessed are sent from a client terminal to a user management equipment realized by one of servers which constitute a network system. The user management equipment sends the network address of that server and user authentication information registered for that server back to the client terminal. Using these pieces of information, the client terminal logs in that server. Each of the servers used by the user notifies the user management equipment of the actual accounts for the user at preferable times. Using the notified information, the user management equipment manages the actual accounts of each user. Each user can know the total of actual accounts for the servers used by accessing only the user management equipment.

Abstract: A write driver for writing write data to a magnetic disk. The write driver is provided with first and second pnp type input transistors whose bases are each supplied with a pair of complementary input signals, and first and second npn type output transistor in the form of an inverted Darlington arrangement. A first resistor element is provided between the emitter of a corresponding pnp type input transistor and the collector of a npn type output transistor, whereas a second resistor element is provided between the common collector of the first and second npn type output transistors and supply voltage. The collectors of the first and second pnp type transistor are supplied with clamp voltage. Third and fourth npn type output transistors each connected to the first and second npn type output transistors in series and subjected to complementary switching control are provided to form a bridge circuit and to drive an inductive head.

Abstract: A data transfer control system in a data transfer apparatus including a plurality of data processing units having different data transfer speeds and a temporary holding circuit provided between the data processing units for temporarily holding data transferred between the data processing units. The data transfer apparatus sends a transfer request for data corresponding to a data storage capacity of the temporary holding circuit of the data transfer apparatus to the data processing unit on the side of sending data and sends a transfer request for data corresponding to the data storage capacity of the temporary holding circuit after an elapse of a delivering time of data to an information processing unit on the data transferred side of the temporary holding circuit from the time of the data transfer request is sent until the requested data from the data processing unit on the data sending side reaches the temporary holding circuit of the data transfer apparatus.

Abstract: A printing control method and apparatus for combining forms data and printing data to produce and output printing images. Forms data are handled as a group of forms data including a plurality of component data groups forming partial form elements and component placement information groups specifying intra-page positions of components. For form selection, component placement selection information is selected in the printing data. Component placement information selected and indicated by this component placement selection information is used for form generation. If a plurality of components are the same in partial form elements, therefore, a plurality of kinds of forms data can use components in common and are administered by only component placement information specifying intra-page positions of respective components. As for forms data needed at the time of printing, therefore, components of form elements are placed and combined in accordance with the component placement information.

Abstract: In a computer system having an interface with an I/O bus given disconnect/reconnect functions and a plurality of magnetic disk subsystems connected with the I/O bus, control divides a file at a disk access time with reference to disk management information, file management information and file descriptor translation information to read/write a plurality of such files asynchronously. Thus, high speed file access can be realized by only the plurality of magnetic disk subsystems without requiring any special control hardware. A corresponding relation between subfiles in a virtual directory and the application request file can be taken to construct the directory, thus making the divided storage transparent to the application.

Abstract: A typical structure of a file server system is a file server system having a plurality of file servers connected in parallel on a network and sharing files placed distributedly in the file servers among a plurality of client computers, and there are provided in a specific file server among the plurality of file servers, a load information monitoring device for measuring respective loads of the plurality of file servers and a file access request distributing device for referring to the loads measured by the load information monitoring device so as to select a file server having a light load from the plurality of file servers having light loads, and distributing a file access request transmitted from client computers to the selected file server.

Abstract: In a check-out system, in which a purchaser himself who intends to purchase commercial products performs a check-out processing, having a commercial product casted portion, a stocker for stocking the commercial products, a transport unit for transporting the commercial product from the commercial product casted portion to the stocker, and a commercial product identifying unit located between the commercial product casted portion and the stocker for identifying the commercial product transported from the commercial product casted portion, the commercial product casted portion is provided with a commercial product code inputting unit for inputting a commercial product code, and a commercial product detecting unit for detecting that the commercial product is put on the transport path, and the commercial product identifying unit is provided with a commercial product code reading unit for reading the commercial product code of the commercial product being transported; and a first mode in which when the commercial

Abstract: A system for producing parts/substrate assemblies each of which includes a substrate such as a ceramic substrate and a plurality of parts such as LSIs mounted on the substrate. After the LSIs for one lot of the production have been checked for excess or deficiency, etc. by a collating device, they are formed with solder bumps and then inspected. The LSIs are automatically arranged on empty work pallets as parts kits by a kit setting apparatus, and the work pallets on each of which the corresponding LSIs have been arranged as the parts kit are moved into a stocker. A host computer gives a command for mounting the LSIs on the ceramic substrate on which they can be mounted, on the basis of information indicating the stocked pallet and information indicating the progress of the ceramic substrate. An LSI mounting apparatus reads the serial No. of the introduced ceramic substrate, and requests the stocker to deliver the work pallet on which the associated LSIs have been arranged as the parts kit.

Abstract: A vector data processor includes a vector data buffer for receiving a plurality of arrayed data items requested from a storage including a plurality of storage banks (banks-0-3 in FIG. 2) for independent operations. The vector data buffer is constructed of a plurality of bank memories which conform to a corresponding periodic relationship between the arrayed data items and the storage banks. Date storing areas for storing the arrayed data items are preset on the successively different bank memories of the vector data buffer in the sequence in which the individual arrayed data items have been requested. The individual storage banks in the sequence in which the arrayed data items have been requested are respectively connected to the successively different bank memories, and the arrayed data items fetched from the individual storing banks are stored in the connected bank memories in succession.

Abstract: A reference voltage for an analog-to-digital (A/D) converting unit is converted into plural digital values through the effect of the A/D converting unit. A difference between an average value of the digital values and an ideal reference value is derived. If the different is larger than a predetermined allowable value, it is determined that a transient abnormality takes place in an A/D converter system. The last measured reference voltage and its related digital input signal are disallowed to be used as measured values. If detection of a transient abnormality serially takes place predetermined times, it is determined that a constant abnormality takes place in the A/D converter system.

Abstract: A multi-chip module and a process for manufacturing the same comprises at least first and second semiconductor chips each formed with a plurality of semiconductor elements on their circuit forming surfaces and having different functions, mounted on a substrate. An insulating film is formed over the circuit forming surfaces of the first and second semiconductor chips. First and second connecting holes are formed in the insulating film over the circuit forming surfaces of the first and second semiconductor chips, respectively. A wiring layer is formed across the first and second connection holes so as to connect the first and second semiconductor chips electrically.

Abstract: A method and apparatus for controlling the phase of a system clock, in which one of a first clock signal and a second clock signal is selected and output to a system as a system clock signal, the first clock signal being generated by a frequency synthesizer synchronized with an external clock signal supplied from a reference clock signal oscillator provided externally of the system, and the second clock signal being supplied from another reference clock signal oscillator provided internally of the system, and the phases of the first and second clock signals are controlled, prior to switching between the first and second clock signals and supplying the switched clock signal to the system as the system clock signal. The switching is delayed for a period while there is a phase shift between the first and second clock signal , when the system clock signal is switched between the first and second clock signal.