Patents Assigned to HITACHI COMPUTER PRODUCTS
  • Patent number: 8033182
    Abstract: A detection assembly for detecting a morphology of a person is provided. The assembly includes a sensor and a processing unit. The sensor includes (i) first and second main linear electrodes covering different zones of a plane, and (ii) a third auxiliary linear electrode having substantially at least an open loop shape and almost entirely surrounding the first and second main electrodes in said plane. The processing unit is connected to the electrodes and is for (i) powering the electrodes at controlled voltage levels, (ii) making use of signals taken from the electrodes in the form of ratios between two of the signals, and (iii) delivering binary signals representing a percentage by which a main electrode is covered by comparison of a signal taken from the main electrodes with a predetermined threshold, and analog signals representing a percentage of covering of at least one electrode.
    Type: Grant
    Filed: July 21, 2006
    Date of Patent: October 11, 2011
    Assignee: Hitachi Computer Products (Europe) S.A.S.
    Inventors: Claude Launay, Joaquim Da Silva, Florent Voisin
  • Patent number: 7987033
    Abstract: The present invention relates to a method determining the morphology of the occupant of an automotive car, characterized in that it comprises the steps of collecting (200) the outputs of a plurality of capacitive sensors (100) provided on a seat, determining for each capacitive sensors (100) a first value representative of the distance (di) separating a target (10) from the sensor (100) and a second value (Sdi) representative of the surface of the sensor (100) covered by the target (10), applying (210) to the second values (Sdi) representative of the surface of the sensor (100) covered by the target (10) a respective weighting (Wi) based on the corresponding first value (di) representative of the distance separating the target (10) from the same sensor (100), and determining (240) the morphology of the target (10) on the basis of the collection of weighted second values (SdixWi).
    Type: Grant
    Filed: May 15, 2007
    Date of Patent: July 26, 2011
    Assignee: Hitachi Computer Products (Europe) S.A.S.
    Inventors: Claude Launay, Joaquim Da Silva, Florent Voisin, Tomoaki Hirai, Takanori Ninomiya, Shunji Maeda
  • Patent number: 7962311
    Abstract: The present invention relates to a method for discriminating the morphology of a passenger seating in an automotive seat, comprising the steps of i) providing a set of a plurality of capacitive sensors (100) covering substantially a transversal cross section of a seat, ii) collecting the outputs of said plurality of capacitive sensors (100) provided on the seat, iii) determining the morphology of a target (10) facing the seat on the basis of measured distance separating the target (10) from the sensors (100) and measured surface of the sensors (100) covered by the target (10), from said outputs, and iv) comparing the determined morphology with at least a reference so as to classify the determined morphology between a plurality of reference ones.
    Type: Grant
    Filed: June 21, 2007
    Date of Patent: June 14, 2011
    Assignee: Hitachi Computer Products (Europe) S.A.S.
    Inventors: Claude Launay, Tomoaki Hirai, Joaquim Da Silva, Florent Voisin, Takanori Ninomiya, Shunji Maeda
  • Patent number: 7895014
    Abstract: The present invention relates to a method to locate a target in regard of a sensor, comprising the steps of collecting the outputs of a capacitive sensor comprising a plurality of electrodes and combining said outputs so as to obtain a signal representative of the distance separating said target from the sensor.
    Type: Grant
    Filed: May 15, 2007
    Date of Patent: February 22, 2011
    Assignee: Hitachi Computer Products (Europe) S.A.S.
    Inventors: Claude Launay, Joaquim Da Silva, Florent Voisin, Tomoaki Hirai, Takanori Ninomiya, Shunji Maeda
  • Publication number: 20080211213
    Abstract: The invention concerns a detection set comprising in combination a sensor (100) comprising three electrodes: two main electrodes (110, 120) covering different zones of the space and the third auxiliary electrode (130), surrounding almost entirely the two main electrodes (110, 120) and processing means (200) connected to said electrodes(110, 120, 130) to power same through controlled voltage levels, operate the signals sampled therefrom as ratios between two signals and deliver partly binary data representing the overlap or non-overlap of one main electrode (110, 120) by comparing the signal sampled thereon with a predetermined threshold and partly analog data representing the percentage of overlap of at least one electrode.
    Type: Application
    Filed: July 21, 2006
    Publication date: September 4, 2008
    Applicant: HITACHI COMPUTER PRODUCTS (EUROPE) S.A.S.
    Inventors: Claude Launay, Joaquim Da Silva, Florent Voisin
  • Patent number: 7098673
    Abstract: The invention relates to a measuring device including at least one measuring probe, sequentially applying a controlled supply voltage between the measuring probe and a reference element, and integrating accumulated electric charges on the measuring probe. The device also includes at least one auxiliary measuring probe, which is also sequentially linked to a controlled electric supply and to charge integrating means. The auxiliary measuring probe has a capacity, in relation to a potential detection zone, which is different from the main measuring probe. Comparative use of signals respectively emitted by the two measuring probes enables the influence of the main measuring probe to be determined.
    Type: Grant
    Filed: June 27, 2002
    Date of Patent: August 29, 2006
    Assignee: Hitachi Computer Product (Europe) S.A.S.
    Inventors: Claude Launay, Pascal Jordana, Daniel Le Reste, William Pancirol, Joaquim Da Silva, Philippe Parbaud
  • Publication number: 20060033507
    Abstract: A capacitive detection system comprising a capacitive sensor having a conductive electrode disposed to generate an electric field in a detection zone when the electrode is subjected to an electric potential, and an electronic control device connected at least to the first electrode. The first electrode of the capacitive sensor is disposed substantially entirely over a conductive screen connected to the control device.
    Type: Application
    Filed: January 9, 2004
    Publication date: February 16, 2006
    Applicant: HITACHI COMPUTER PRODUCTS
    Inventors: Gerard Gaumel, Joaquim Da Silva, Philippe Parbaud, Claude Launay
  • Patent number: 6807636
    Abstract: A system, method, apparatus, means, and computer program code for facilitating security in a network, particularly a distributed network. According to embodiments of the present invention an apparatus or system may include a manager in communication with one or more mappers and one or more adapters for facilitating security requests that may be associated with an application or its environment. An adapter may be associated with an application to identify security requests associated with the application. Similarly, a mapper may be associated with a security service to facilitate communication to and from the security service regarding security requests.
    Type: Grant
    Filed: February 13, 2002
    Date of Patent: October 19, 2004
    Assignee: Hitachi Computer Products (America), Inc.
    Inventors: Bret A. Hartman, Donald J. Flinn, Theodore R. Burghart, Jr.
  • Patent number: 6035411
    Abstract: The present invention is a method and apparatus for organizing memory buffers between an i/o subsystem and a computer system. The present invention organizes the memory buffers that exist between a computer system and an associated i/o subsystem into a memory hierarchy. An example of such a hierarchy includes, in order, a disk buffer, a disk cache, a controller memory and a computer system memory. Each datablock in the memory hierarchy is given an associated index word. The index word contains the address of the datablock within the media of the disk drive and contains index bits which indicate where the datablock may be found in the memory hierarchy. As a datablock moves between the disk drive and the computer system, a mirror copy of the datablock is maintained in a memory buffer that is in the next adjacent level of the memory hierarchy. In this way, the mirror copy may be used if the datablock becomes inaccessible.
    Type: Grant
    Filed: December 23, 1996
    Date of Patent: March 7, 2000
    Assignee: Hitachi Computer Products, Inc.
    Inventor: Ruben Yomtoubian
  • Patent number: 5914967
    Abstract: The present invention is a method and apparatus for predicting the future failure of a disk drive. Structurally, the present invention is implemented as a series of diagnostic and statistical routines contained in a ROM on the logic board of a disk drive. The routines detect errors that occur during normal operation of the disk drive and issue a warning if the number of errors or the rate at which errors occur has exceeded predetermined levels. In addition to monitoring errors that occur during normal operation, the diagnostic routines may be activated to test for the presence of recoverable errors. Recoverable errors are detected by running a series of diagnostic tests after enabling error detection and disabling error correcting codes as well as device retries. Once again, a warning is issued if the number of errors or the rate at which errors occur has exceeded predetermined levels.
    Type: Grant
    Filed: January 18, 1997
    Date of Patent: June 22, 1999
    Assignee: Hitachi Computer Products (America), Inc.
    Inventor: Ruben Yomtoubian
  • Patent number: 5895438
    Abstract: The present invention is an inline tester for analyzing the integrity of a disk drive. Structurally, the inline tester includes a set of statistical and diagnostic routines included in the ROM of a disk drive and a diagnostic logic section included in the drive's logic board. In initial use, the inline tester reconfigures the drive, making the drive less tolerant of flaws within the drive's media. The drive is also reconfigured to enable error detection and disable error correcting codes as well as device retries. Each sector of the media is then tested with multiple test patterns and failing sectors are added to a list of suspected sectors. At the conclusion of testing, the drive is restored to its normal operating configuration with error correcting codes and device retries enabled. Later, each sector in the list of suspected sectors is re-tested. Sectors that fail are added to the drive's list of bad sectors and are replaced by an alternate sector allocated from a reserved portion of the drive.
    Type: Grant
    Filed: December 23, 1996
    Date of Patent: April 20, 1999
    Assignee: Hitachi Computer Products (America ), Inc.
    Inventor: Ruben Yomtoubian
  • Patent number: 5815143
    Abstract: A video picture written in the bit map memory (4) is displayed in a predetermined area on the display screen (70) of the display device (7) within the computer main body (100). The masking memory (2) having a bit number equal to or less than the number of the pixels of the video picture to be inputted is provided separate from the bit map memory (4). When the pixel data of the video picture data has been inputted, the input pixel data is selectively written in the bit map memory (4) based on the contents of the masking memory (2). In displaying a compressed picture of the input video picture on the display screen, an oblique line generating algorithm is used.
    Type: Grant
    Filed: April 17, 1996
    Date of Patent: September 29, 1998
    Assignee: Hitachi Computer Products (America)
    Inventors: Warren Kimberly Jenney, Randy Minobe, Tomohisa Koyiyama, Masami Yamagishi, Takahiro Yamada, Munekazu Kamo, Makoto Noumi, Noriyuki Iwai
  • Patent number: 5671349
    Abstract: The present invention provides a system of hardware and software that combine to form a redundant array of disk drives. This array provides a double means of redundancy that can reconstruct data from two simultaneously failed disks. The double redundancy means is implemented by two separate algorithms, DRR1 and DRR2. DRR1 takes the exclusive-or of all the commercial data and stores the result as redundancy data. DRR2 is similar to the algorithm described in Patel's article. As an additional feature, the implementation of DRR1 and DRR2 in the present invention is flexible enough to support either on-the-fly or read-modify-write level operation. Although both algorithms are in the prior art, the present invention improves on the run-time and space requirements of the algorithm. This improvement arises because of a novel relationship, discussed below, that exist between the individual T.sup.
    Type: Grant
    Filed: December 6, 1994
    Date of Patent: September 23, 1997
    Assignee: Hitachi Computer Products America, Inc.
    Inventors: Ebrahim Hashemi, Martin E. Schulze
  • Patent number: 5550710
    Abstract: A housing and cooling structure for a personal processor module (PPM) is provided which includes a case which is sealed and will fit within both a desktop sized docking station and a smaller notebook sized docking station. Within the case, the components which make up the PPM are located in such a way as to minimize the size of the printed circuit boards. In addition, a cooling mechanism is provided which cools all of the components within the case. Also, the PPM has structure for converting 3.3 volt signals into 5 volt signals and for permitting easy upgrades.
    Type: Grant
    Filed: September 9, 1994
    Date of Patent: August 27, 1996
    Assignee: Hitachi Computer Products (America), Inc.
    Inventors: Uriel Rahamim, Randy Minobe, Ahmad A. Chahrour, Raanan Ben-Zur
  • Patent number: 5463742
    Abstract: A highly portable personal processor module (PPM) for use in a variety of docking stations, each of which can be connected to the personal processor via a standard connector, the personal processor and docking station when so connected defining a complete computer system, the personal processor containing a microprocessor, magnetic storage and memory, and the docking station providing at least a power supply, a cooling system for the PPM, a keyboard and a display. The personal processor is loaded with a user's personalized operating system and software so that the user can carry their preferred computing environment with them. The personal processor module also includes control software that reads and recognizes a type code provided by each docking station and configures the PPM accordingly. For the situation when the PPM cannot identify the docking station to which it is connected, the PPM provides a default configuration routine.
    Type: Grant
    Filed: March 5, 1993
    Date of Patent: October 31, 1995
    Assignee: Hitachi Computer Products (America), Inc.
    Inventor: Shigeo Kobayashi