Abstract: The present invention relates to a method and an apparatus for decoding double-encoding codes in which the information to be decoded comprises a first data and a second data. The operation for decoding double-encoding codes is achieved through two stages. A decoder of the first stage checks the first data, and when an error is found in the first data, all symbols of the first data are assumed to be wrong. The first-stage decoder then adds an erasure flag to all symbols to generate erasure symbols. As a result, these erasure symbols include the symbols which are actually erroneous and those which are correct. A decoder of the second stage is used to perform an error correction on the second data. For this purpose, the second-stage decoder detects the number of erasure symbols which are contained in the second data and which are actually erroneous.

Abstract: A video signal to be recorded on a recording medium used in a video tape recorder or optical disk recorder is digitized, distributed into several bit sets, and then subjected to separate processings or converting operations. The bit sets are merged into a data word with the same number bits as of the original digital data and, after being processed for bit inversion at a certain data interval, it is recorded on the recording medium. Data words retrieved from the recording medium are processed for bit inversion and inverse conversion in a reverse order with respect to the recording process, and a high quality video signal including a smaller number of bit errors can be reproduced.

Abstract: A digital registration circuit for a multi-tube television camera wherein correction quantities corresponding to positions on a target of an image pickup tube are stored in a digital memory. The digital signal for the correction quantity read out from the digital memory is converted into an analog signal which is supplied to a low-pass filter and smoothed. The smoothed signal is sampled at a sampling frequency higher than the frequency at which the correction quantities stored in the digital memory are read out and the sampled signal is converted into a digital signal. The digital signals sequentially produced are applied to a shift register, and four sequential sample values supplied from the shift register are added together in an adder. The shift register operates in such a manner that four samples are shifted one by one every adding time. An output signal from the adder is used for correcting registration, so that the generation of shading can be prevented.

Abstract: A television camera capable of correcting shadings caused by digital registration faculty employed in a multi-tube type color television camera. The television camera comprises differentiating circuits for generating differentiated waves of correction waveforms used for adjusting registration, and non-linear circuits for processing the differentiated waves. Outputs of the non-linear circuits control the gain of a video signal circuit so that components responsible for the generation of shadings can be removed from a video signal.

Abstract: An automatic iris adjustment system comprises a camera lens including an iris driving means for controlling the iris value; an image pickup element for converting the amount of light incident to the camera lens into an electrical signal; means for comparing the iris adjustment signal voltage V.sub.I from the image pickup element with the reference voltage V.sub.O to evaluate an error voltage V.sub.E (i.e., V.sub.E =V.sub.I -V.sub.O); means for calculating a varying component .DELTA.IRIS of iris control value as a predetermined function of the error voltage V.sub.E ; means for calculating an iris control value IRIS.sub.n basing on the calculated varying component .DELTA.IRIS of iris control value; and means for controlling the iris driving means in response to the calculated iris control value IRIS.sub.n.

Abstract: In the code modulation system for converting input data levels into an output signal in the form of code words by providing M input levels among N input levels assigned to input data with stairlike code weights on the basis of the input levels, (N-M) input levels which are the difference between said N input levels and said M input levels are respectively disposed near transition points where said stairlike code weight is changed, and the code weights are provided with hysteresis in the ascent process and the descent process of the input data level.

Abstract: In an adder for floating point data, two floating point data are adjusted so that the exponent parts have the same value and the resulting adjusted mantissa parts are added. A first shift signal is generated on the basis of the result of the added mantissa parts and having a value necessary for normalization of the addition result, and a second shift signal is generated having a value equal to the difference between the adjusted exponent part of the floating point data and a minimum value predetermined for an exponent of any floating point data at which underflow occurs. The result of addition of the adjusted mantissa parts is shifted on the basis of said second shift signal or said first shift signal depending on whether or not an underflow occurs.

Abstract: In a radio system wherein a read signal generator generates a read signal constituted by a plurality of bits, the read signal is supplied to a memory circuit for storage of data to read out the data, and the read out data determines the frequency generated by a synthesizer, the memory circuit and a holding circuit are packaged on an independent substrate, and the read signal generator comprises a first read signal generator generating about half the bits which is held in the holding circuit and a second read signal generator generating the remaining bits.

Abstract: A circuit for generating a signal for correcting deflection of electron beam, which circuit is advantageously used as, for example, a circuit for correcting registration in a multi-tube type color television camera. In the correction signal generating circuit, quantities of corrections at intersections defined by a plurality of lines extending in horizontal and vertical directions so as to divide a surface scanned by the electron beam into a plurality of areas are stored in terms of digital values. The digital signal read out from the memory is converted into an analog signal. The analog signal is then supplied to low-pass filter means. From the output signal of the low-pass filter means, quantities of correction are prepared for the scanning lines present between the two intersections located adjacent to each other in the vertical direction. In the circuit, the shading is positively prevented from occurring.

Abstract: Disclosed is a phase control system for providing by digital processing a timing signal having a certain phase relationship with a timing signal detected in a received, modulated signal, wherein the detected timing signal is delayed by a predetermined time period and the detected timing signal and the delayed timing signal are multiplied by respective constants so that the zero-cross point of the composite signal of the two timing signals matches the sampling point of the timing signal.

Abstract: A photodetector output circuit comprises a plurality of adjacent photodetectors grouped into pairs having first and second photodetectors for generating signals indicative of levels of light falling thereon, a first shift register for receiving the signals from the first photodetectors in the pairs, a second shift register for receiving the signals from the second photodetectors in the pairs, and a pair of first and second sample and hold circuits for successively sampling and holding outputs from final stages of the first and second shift registers, respectively. A comparator receives as inputs outputs from the first and second sample and hold circuits for delivering out signals when the received inputs have a level difference of a predetermined value or higher. With this arrangement, the photodetector output circuit can produce digital signals indicative only of abrupt changes in the level of incident light and excludes any influence due to gradual light level variations which would result from shading.

Abstract: According to the present invention, a normalized floating point type multiplier circuit including a multiplier for mantissa's multiplication and an adder for exponent's addition is equipped with both a detector circuit for detecting over- and under-flows and a compensation circuit for compensating the output of said multiplier without any programming, when the over- and under-flows are detected, so that the multiplying speed can be improved.

Abstract: In a gain control circuit, an electric power calculating circuit is connected to a variable gain amplifier and a gain setting circuit for generating a gain control signal applied to the variable gain amplifier to control the gain thereof.

Abstract: In an alternating sweeping system for use in an oscilloscope of the type wherein a sweeping signal and a delayed sweeping signal are alternately supplied to a horizontal deflection circuit of the oscilloscope, and wherein a unblanking signal and a delayed unblanking signal are alternately supplied to a brightness modulation circuit, widths of the delayed sweeping signal and the delayed unblanking signal made to be less than one half of width of the sweeping signal and the unblanking signal so that the delayed blanking signal and the delayed unblanking signal are used a plurality of times during an interval in which the sweeping signal and the unblanking signal are used once.

Abstract: In a solid state imaging device in which two signals on two horizontal scanning lines are read out simultaneously for easy image enhancement, the two signals read from the two horizontal scanning lines are subtracted from each other while they are added together, and the difference signal is added to the sum signal so as to produce a video signal subject to the image enhancement. As a solid state image sensor, a MOS type image sensor as well as a CCD, CID or CC type image sensor may be used.

Abstract: A magnetic recording method for digital signals, and more particularly to a magnetic head driving current waveform wherein digital signals to be recorded on a magnetic tape at a high density have the waveform of the head driving current shaped in order to reduce the degradation of the waveform. That is, in a case where the period of the current reversal of the driving current is long and continues for at least 1.5 times the bit period, the amplitude of the current in the rise part of the wave is made small. The driving current of this waveform has a reduced waveform degradation, and the magnetic recording at the high density becomes possible.

Abstract: A signal processor having a wide dynamic range and which can process both data in the fixed point representation and data in the floating point representation by the use of a single floating-point arithmetic circuit is capable of processing digital signals, such as voice signals, at high speed and in real time. In addition, this signal processor is capable of executing data input/output operations with an external circuit in the data format of the fixed point representation and of performing internal operations in the floating point representation format. Further, conversion of an operational result from fixed point representation to floating point representation, and vice versa, can be performed internally in accordance with program instruction.

Abstract: An autoregistration system is disclosed for a color television camera equipped with a plurality of image pickup devices so as to combine picture signals obtained through the plurality of channels from the plurality of image pickup devices into a composite color television signal. The autoregistration system comprises means for producing a level difference signal representing a predetermined difference in level between the picture signals of desired two channels, between which a picture image registration is to be carried out, and a first and second edge signals of the two channels; and means for subjecting the level difference signal and first and second edge signals to an operational processing to obtain a discriminatory signal representing the direction of a registration offset between the picture signals of the two channels.

Abstract: Disclosed is a solid state television camera with solid state image sensor for converting an optical image into electrical signals, which is comprised of a pulse generator for generating a train of pulses with a frequency equal to the horizontal scanning frequency of a television system, a frequency divider for frequency-dividing the pulse train into a signal with a frequency substantially equal to the vertical scanning frequency alternately in two modes of l/n and l/n+l (where n is a positive integer), and a selective circuitry for forming a train of pulses with a desired vertical scanning frequency on the basis of the pulse trains derived from the pulse generator and the frequency divider.

Abstract: An equalizer apparatus suitable for use in a MODEM for receiving a signal having passed through a number of carrier-band lines is disclosed in which the number of carrier-band lines is detected from a training signal, and electrical connection of a fixed equalizer to a variable equalizer is controlled on the basis of the number of carrier-band lines, in order to form a precise, simple automatic equalizer apparatus.