Patents Assigned to Hitachi Haramachi Semi-conductor, LTD
  • Patent number: 6331845
    Abstract: A liquid crystal active matrix display device includes a first substrate having a thin film transistor formed thereon. A light-screening film 1 is located on the first substrate in a manner to be overlapped with an ITO. The display device includes a second substrate having a color filter and a light-screening film 2 formed thereon. The second substrate is opposed to the first substrate. The light-screening film 2 extends from the uncontrollable area by a certain value depending on a voltage from the external, resulting in improving a numerical aperture.
    Type: Grant
    Filed: September 14, 1999
    Date of Patent: December 18, 2001
    Assignees: Hitachi, LTD, Hitachi Haramachi Semi-conductor, LTD
    Inventors: Masaaki Kitajima, Makoto Tsumura, Yoshiro Mikami, Katsuyuki Funahata, Yoshiharu Nagae, Yoko Wakui, Ryuichi Saito, Makoto Matsui, Fumiaki Nemoto
  • Patent number: 6064358
    Abstract: A liquid crystal active matrix display device includes a first substrate having a thin film transistor formed thereon. A light-screening film 1 is located on the first substrate in a manner to be overlapped with an ITO. The display device includes a second substrate having a color filter and a light-screening film 2 formed thereon. The second substrate is opposed to the first substrate. The light-screening film 2 extends from the uncontrollable area by a certain value depending on a voltage from the external, resulting in improving a numerical aperture.
    Type: Grant
    Filed: July 23, 1996
    Date of Patent: May 16, 2000
    Assignees: Hitachi, Ltd., Hitachi Haramachi Semi-Conductor, Ltd.
    Inventors: Masaaki Kitajima, Makoto Tsumura, Yoshiro Mikami, Katsuyuki Funahata, Yoshiharu Nagae, Yoko Wakui, Ryuichi Saito, Makoto Matsui, Fumiaki Nemoto
  • Patent number: 5561440
    Abstract: A liquid crystal active matrix display device includes a first substrate having a thin film transistor formed thereon. A light-screening film 1 is located on the first substrate in a manner to be overlapped with an ITO. The display device includes a second substrate having a color filter and a light-screening film 2 formed thereon. The second substrate is opposed to the first substrate. The light-screening film 2 extends from the uncontrollable area by a certain value depending on a voltage from the external, resulting in improving a numerical aperture.
    Type: Grant
    Filed: August 7, 1991
    Date of Patent: October 1, 1996
    Assignees: Hitachi, Ltd., Hitachi Haramachi Semi-Conductor, Ltd.
    Inventors: Masaaki Kitajima, Makoto Tsumura, Yoshiro Mikami, Katsuyuki Funahata, Yoshiharu Nagae, Yoko Wakui, Ryuichi Saito, Makoto Matsui, Fumiaki Nemoto
  • Patent number: 5253156
    Abstract: A semiconductor integrated circuit unit, suitable for the control of a motor, has an integrated structure within the same semiconductor substrate, comprising an inverter circuit, drive circuits for driving the switching elements of the inverter circuit, an internal power source circuit for supplying power to the drive circuits which drive the upper arm side of the inverter circuit, and a logical circuit for transmitting a signal to the drive circuits which drive the upper arm side of the inverter circuit.
    Type: Grant
    Filed: January 29, 1991
    Date of Patent: October 12, 1993
    Assignees: Hitachi, Ltd., Hitachi Haramachi Semi-Conductor, Ltd.
    Inventors: Naoki Sakurai, Mutsuhiro Mori, Hidetoshi Arakawa, Kenichi Onda, Hideki Miyazaki, Akihiko Kanouda
  • Patent number: 5184272
    Abstract: A switching circuit providing detection circuit for detecting a current which flows through a main P-channel MOSFET detection of a floating voltage dependent upon a power supply potential, a reference-voltage generating circuit for generating a reference voltage which is a floating voltage dependent upon the power supply potential and has a constant value independently of variations in power supply potential, a comparator circuit operated on a supply voltage which is a floating voltage dependent upon the power supply potential, for comparing a detected voltage from the detection circuit with the reference voltage from the reference-voltage generating means, to convert the detected voltage into a logic voltage signal (i.e., a bi-level voltage signal and a conversion circuit for converting the logic voltage outputted by the comparator circuit into a voltage measured from a ground potential.
    Type: Grant
    Filed: March 29, 1990
    Date of Patent: February 2, 1993
    Assignees: Hitachi, Ltd., Hitachi Haramachi Semi-Conductor Ltd.
    Inventors: Koichi Suda, Hitoshi Matsuzaki, Masayuki Wada, Shoichi Ozeki
  • Patent number: 4833587
    Abstract: A fraction of current passing through the P-emitter region and N-base region of a thyristor is by-passed to the base-emitter junction of a PNP transistor. The amount of the base current is dependent on the thyristor current. Thus, as the anode current of the thyristor increases, the base current and hence the collector current of the PNP transistor increases. The collector current by-passed to the PNP transistor is fed, via a switch which is closed during the off-time of the thyistor, to the base-collector path of an NPN transistor whose collector and emitter are respectively connected to the gate and cathode of the thyristor. The turn-on voltage across the collector and emitter of the NPN transistor accordingly becomes lower than the gate-cathode voltage of the thyristor. The base-emitter current of the NPN transistor equals the collector current of the PNP transistor, the collector current being a fraction of the anode current by-passed to the PNP transistor.
    Type: Grant
    Filed: March 21, 1988
    Date of Patent: May 23, 1989
    Assignee: Hitachi Ltd. and Hitachi Haramachi Semi-Conductor Ltd.
    Inventors: Shigeru Sugayama, Tadaaki Kariya, Tatsuo Shimura, Sigeo Tomita
  • Patent number: 4775916
    Abstract: A pressure contact semiconductor device has a semiconductor substrate disposed on a metal post electrode through metal electrode plate, an insulating ring engaged with the periphery of the metal post electrode extends to the periphery of the metal electrode plate and is brought into contact therewith at a certain height with a sufficient contact pressure. The semiconductor substrate is positioned precisely with respect to the metal post electrode so that a gate electrode ring is precisely positioned on a gate electrode film formed on the upper surface of the semiconductor substrate.
    Type: Grant
    Filed: August 21, 1986
    Date of Patent: October 4, 1988
    Assignees: Hitachi Ltd., Hitachi Haramachi Semi-Conductor Ltd.
    Inventors: Shigeyasu Kouzuchi, Shuroku Sakurada, Tadashi Sakaue, Masafumi Ono
  • Patent number: 4758942
    Abstract: A turn-off control circuit for a gate turn-off thyristor is used in a state where one end of an inductive load is connected therewith on the cathode side. The turn-off control circuit includes a first turning-off transistor, which takes-out electric current through the gate at the first stage of the turn-off operation of the gate turn-off thyristor, and a second turning-off transistor, which takes-out electric current through the gate at the second stage of the turn-off operation of the gate turn-off thyristor so as to surely effect the turn-off operation.
    Type: Grant
    Filed: October 8, 1987
    Date of Patent: July 19, 1988
    Assignees: Hitachi Ltd., Hitachi Haramachi Semi-Conductor. ltd.
    Inventors: Masayuki Wada, Chooji Shiina, Tadaki Kariya, Tatsuo Shimura
  • Patent number: 4740723
    Abstract: A voltage across a resistor of a small value connected in series with the cathode or anode of a thyristor is used as a signal source for overcurrent detection. When an overcurrent is generated, the voltage across the resistor increases in excess of the built-in voltage between the base and emitter of a transistor, thereby turning on the transistor. A transistor to take out a current from the gate of the thyristor is turned on. Thus, the self-turn off operation of the thyristor is executed.
    Type: Grant
    Filed: March 21, 1986
    Date of Patent: April 26, 1988
    Assignees: Hitachi, Ltd., Hitachi Haramachi Semi-Conductor, Ltd.
    Inventors: Shigeru Sugayama, Tatsuo Shimura, Tadaaki Kariya, Sigeo Tomita
  • Patent number: 4665505
    Abstract: A write circuit for a semiconductor storage device which comprises a data output stage constructed by a composite circuit including at least one MOS transistor logic circuit and bipolar transistor. The Mos transistor circuit operates in response to an input signal to control the on-off states of at least one of the bipolar transistors. The write circuit implements less power consumption.
    Type: Grant
    Filed: December 24, 1984
    Date of Patent: May 12, 1987
    Assignees: Hitachi, Ltd., Hitachi Haramachi Semi-Conductor Ltd.
    Inventors: Nobuaki Miyakawa, Yoshiaki Yazawa, Shoichi Ozeki, Kinya Mitsumoto
  • Patent number: 4305088
    Abstract: A semiconductor device comprises a heat-radiating electrode plate, a semiconductor element soldered to the depressed portion formed in the heat-radiating electrode plate, a header lead soldered onto the semiconductor element, a terminal board of insulating material fixed on the heat-radiating electrode plate, and a lead terminal secured to the terminal board and with the one end thereof electrically and mechanically connected to the header lead. The semiconductor device further comprises means for mitigating the transmission to the solder of the stress generated along the length of the header lead by the difference in the coefficient of thermal expansion among the component parts, and means for alleviating the lateral stress generated in the solder by the difference in the coefficient of thermal expansion between the header lead and the semiconductor element.
    Type: Grant
    Filed: October 10, 1980
    Date of Patent: December 8, 1981
    Assignees: Hitachi, Ltd., Hitachi Haramachi Semi-Conductor, Ltd.
    Inventors: Kazutoyo Narita, Tadashi Sakaue, Noboru Kawasaki, Motoji Nakajima