Patents Assigned to Hitachi Information & Control Solutions, Ltd.
  • Patent number: 9710731
    Abstract: Disclosed are a foreign matter inspection device and a foreign matter inspection method, in which the accurate inspection of foreign matter is performed using captured images by continuous shooting in the state in which a movement locus due to the falling caused by the movement of the foreign matter along the inner wall of a container from the horizontal direction of the container as a result of rotation is formed so as to be long. A rotating device is provided with a rotation control means for executing the rotational motion in which container holding members for holding the container in a horizontal manner or at a constant inclination angle relative to the horizontal axis of the container, and the container are rotated at an angle of 60° or more, and then stopped, wherein a foreign matter detection means detects the foreign matter according to the movement locus of the foreign matter, which is formed using the captured images obtained by the continuous shooting for each rotational motion at constant time.
    Type: Grant
    Filed: May 26, 2011
    Date of Patent: July 18, 2017
    Assignee: Hitachi Information & Control Solutions, Ltd.
    Inventors: Hirohisa Fukuda, Kunitaka Asano, Tadahiro Katane, Hiromi Yamazaki
  • Patent number: 8493927
    Abstract: In a control apparatus which transmits/receives data from a central processing unit via a serial transfer channel to a communication control unit, and groups/distributes data of input/output units from the communication control unit via a parallel transfer channel, the control apparatus initiates a diagnosing unit of the parallel transfer channel in response to an instruction issued from the central processing unit, and diagnosis the input/output units subsequent to the diagnosis of the transmission channel. Data input/output timing of the input/output unit is also instructed from the central processing unit, so that the central processing unit can suppress lowering of response speeds caused by the diagnoses, and can maintain the periodicity of the data input/output.
    Type: Grant
    Filed: June 28, 2007
    Date of Patent: July 23, 2013
    Assignees: Hitachi, Ltd., Hitachi Information & Control Solutions, Ltd.
    Inventors: Akira Bandou, Masamitsu Kobayashi, Masahiro Shiraishi, Akihiro Onozuka, Takashi Umehara, Shin Kokura, Eiji Kobayashi, Masakazu Ishikawa, Yasuyuki Furuta, Naoya Mashiko, Satoru Funaki, Yuusuke Seki, Tatsuyuki Ootani, Wataru Sasaki, Yusaku Otsuka, Akihiro Nakano, Shoichi Ozawa, Takenori Kasahara, Yu Iwasaki
  • Patent number: 8421395
    Abstract: A synchronous motor including therein a three-phase inverter and position sensors, having a unit for calculating a digital input current value from the analog output of an input current detection circuit that detects the input current flowing into the DC input terminal of the three-phase inverter, and a digital feedback speed control unit for adjusting the amplitudes and frequency of the AC voltages outputted from the three-phase inverter in such a manner that the motor speed calculated by a motor speed calculation unit 41 on the basis of the outputs of the position sensors approaches a speed command value received by a communication reception unit from outside the synchronous motor. The synchronous motor further includes therein a communication transmission unit for transmitting the input current value and the motor speed to outside the synchronous motor.
    Type: Grant
    Filed: April 8, 2009
    Date of Patent: April 16, 2013
    Assignees: Hitachi, Ltd., Hitachi Information & Control Solutions, Ltd.
    Inventors: Daisuke Maeda, Kenji Sakurai, Hiroyuki Hasegawa, Hidefumi Shirahama, Mitsuhiro Mishima
  • Patent number: 8423681
    Abstract: A control apparatus for an input-output device includes a hardware part and a software part, in which a controller in the hardware part carries out a control operation in accordance with a signal from the input-output device, outputs a result of the control operation to a process, and has a timer unit to be excited at a constant period; and the software part has an information process part, a control process part, and an interrupt control unit to switch over the information process part and control process part one another, in which the interrupt control unit suspends an execution of the information process part to execute the control process part in priority and resume the information process part by switching over to the information process part from the control process part, when the execution of the control process part is terminated.
    Type: Grant
    Filed: December 6, 2011
    Date of Patent: April 16, 2013
    Assignees: Hitachi, Ltd., Hitachi Information & Control Solutions, Ltd., Hitachi Engineering & Services Co., Ltd.
    Inventors: Yusaku Otsuka, Naoya Mashiko, Shin Kokura, Yu Iwasaki, Ryuichi Murakawa, Akira Bando, Wataru Sasaki, Hideyuki Yoshikawa, Masamitsu Kobayashi
  • Patent number: 8423661
    Abstract: A transmit packet generated by a CPU 1 is held in a buffer 100a (100b). From among packets received from Ethernet 820a (820b), a packet, a destination of which is a communication device 800, is held in the buffer 100a (100b). A packet which should be transmitted is transmitted from a transfer judging circuit 200 to Ethernet 820a or 820b through a MAC unit 300a or 300b. If a transfer judging circuit 200 judges a packet from the Ethernet 820a to be a packet, a destination of which is another communication device, with reference to a destination MAC address, this packet is transferred to the Ethernet 820b through MAC 300b. If a usage rate of a transferring FIFO buffer 130a (130b) exceeds a threshold value in the process of transmitting a packet held in a transmitting FIFO buffer 120a (130b) on a priority basis, the priority order of a transfer packet is made higher than that of a transmit packet so that the transfer packet is transferred to the Ethernet 820a or 820b in preference to the transmit packet.
    Type: Grant
    Filed: September 1, 2010
    Date of Patent: April 16, 2013
    Assignees: Renesas Electronics Corporation, Hitachi Information & Control Solutions, Ltd.
    Inventors: Hiroshi Arita, Yasuhiro Nakatsuka, Yasuwo Watanabe, Kei Ouchi, Yoshihiro Tanaka, Toshinobu Kanai, Masanobu Tanaka, Kenji Furuhashi, Tomoaki Aoki
  • Publication number: 20130070084
    Abstract: Disclosed are a foreign matter inspection device and a foreign matter inspection method, in which the accurate inspection of foreign matter is performed using captured images by continuous shooting in the state in which a movement locus due to the falling caused by the movement of the foreign matter along the inner wall of a container from the horizontal direction of the container as a result of rotation is formed so as to be long. A rotating device is provided with a rotation control means for executing the rotational motion in which container holding members for holding the container in a horizontal manner or at a constant inclination angle relative to the horizontal axis of the container, and the container are rotated at an angle of 60° or more, and then stopped, wherein a foreign matter detection means detects the foreign matter according to the movement locus of the foreign matter, which is formed using the captured images obtained by the continuous shooting for each rotational motion at constant time.
    Type: Application
    Filed: May 26, 2011
    Publication date: March 21, 2013
    Applicant: Hitachi Information & Control Solutions, Ltd.
    Inventors: Hirohisa Fukuda, Kunitaka Asano, Tadahiro Katane, Hiromi Yamazaki
  • Publication number: 20130039150
    Abstract: It is an object to maintain a processing speed while increasing accuracy of a sonar image. Disclosed is a phased-array synthetic-aperture sonar system, including: a plurality of phased array processors (9) which perform, in parallel, phased array processing for a plurality of incoming data; a phased array distribution device (8) which distributes each simultaneously incoming data to the plurality of phased array processors (9), the incoming data being input from a plurality of receivers disposed in a platform; a synthetic aperture processor (11) which performs synthetic aperture processing by using a plurality of phased array processing results; and a data-shaping buffer device (10) which transfers the phased array processing results output from the plurality of phased array processors (9) to the synthetic aperture processor (11) in the order of receipt of the incoming data.
    Type: Application
    Filed: March 18, 2011
    Publication date: February 14, 2013
    Applicants: Japan Agency for Marine-Earth Science and Technology, Hitachi Information & Control Solutions, Ltd.
    Inventors: Jin Goto, Tomohito Ebina, Takao Sawa
  • Patent number: 8255769
    Abstract: A failure is detected immediately and certainly, and continuation of processing in an unstable state is prevented. A first error detection code is generated from first information which is output as a result of execution of a predetermined program conducted by a first processor. A second error detection code is generated from second information which is output as a result of execution of the program conducted by a second processor which is configured so as to output the same computation result as that of the first processor. It is detected whether the first information is the same as the second information, and it is detected whether the first error detection code is the same as the second error detection code. Writing the first information or the second information into a main memory is controlled on the basis of a result of the detection.
    Type: Grant
    Filed: January 6, 2010
    Date of Patent: August 28, 2012
    Assignees: Hitachi, Ltd., Hitachi Information & Control Solutions, Ltd.
    Inventors: Satoru Funaki, Yasuhiro Kiyofuji, Masashi Suenaga, Shin Kokura, Eiji Kobayashi, Akihiro Onozuka, Yusuke Seki, Toshiki Shimizu, Yukiko Tahara, Yuta Sugimoto
  • Patent number: 8231851
    Abstract: An exhaust gas containing a perfluoride compound (PFC) and SiF4 is conducted into a silicon remover and brought into contact with water. A reaction water supplied from a water supplying piping and air supplied from an air supplying piping are mixed with the exhaust gas exhausted from the silicon remover. The exhaust gas containing water, air, and CF4 is heated at 700° C. by a heater. The exhaust gas containing PFC is conducted to a catalyst layer filled with an alumina group catalyst. The PFC is decomposed to HF and CO2 by the catalyst. The exhaust gas containing HF and CO2 at a high temperature exhausted from the catalyst layer is cooled in a cooling apparatus. Subsequently, the exhaust gas is conducted to an acidic gas removing apparatus to remove HF. In this way, the silicon component is removed from the exhaust gas before introducing the exhaust gas into the catalyst layer.
    Type: Grant
    Filed: September 16, 2002
    Date of Patent: July 31, 2012
    Assignees: Hitachi, Ltd., Hitachi Information & Control Solutions, Ltd., Hitachi Kyowa Engineering Co., Ltd.
    Inventors: Kazuyoshi Irie, Toshihiro Mori, Hisao Yokoyama, Takayuki Tomiyama, Toshihide Takano, Shin Tamata, Shuichi Kanno
  • Patent number: 8209594
    Abstract: A receiving device including: a receiver receiving two frames, each including substantially same data attached thereto with a data error detection code, a frame error detection code, and safety flag information indicating a safety function or not, respectively; a first detector connected to the receiver for performing error detection of the frames by use of the frame error detection code, respectively; a second detector connected to the receiver for performing error detection of the data by use of the data error detection code, respectively; and a Direct Memory Access Controller (DMAC) connected to the first and second detectors for outputting one among the data included in the two frames under a condition of the safety function in the two frames when no error is detected in the frame and data error detections.
    Type: Grant
    Filed: October 8, 2010
    Date of Patent: June 26, 2012
    Assignees: Hitachi, Ltd., Hitachi Information & Control Solutions, Ltd.
    Inventors: Akihiro Onozuka, Masakazu Ishikawa, Masamitsu Kobayashi, Takashi Umehara, Shin Kokura, Hiromichi Endoh, Satoru Funaki, Hisao Nagayama, Masahiro Shiraishi, Akira Bando, Eiji Kobayashi, Yasuyuki Furuta, Naoya Mashiko
  • Patent number: 8161362
    Abstract: Processed results are received when processors make compatible computations on data of a common object. A computation command signal is generated and fed to the processors in response to a start signal from any one of the processors so that the processors can make computations with different operation timings. Then, the results of the computations made by the processors are compared with each other. Thus, apparatus capable of small size, high performance and safety at the same time can be achieved by the above construction using the processors.
    Type: Grant
    Filed: June 7, 2006
    Date of Patent: April 17, 2012
    Assignees: Hitachi, Ltd., Hitachi Information & Control Solutions, Ltd.
    Inventors: Akira Bando, Shin Kokura, Takashi Umehara, Masamitsu Kobayashi, Hisao Nagayama, Naoya Mashiko, Masakazu Ishikawa, Masahiro Shiraishi, Akihiro Onozuka, Hiromichi Endoh, Tsutomu Yamada, Satoru Funaki
  • Patent number: 8095695
    Abstract: A control apparatus for an input-output device includes a hardware part and a software part, in which a controller in the hardware part carries out a control operation in accordance with a signal from the input-output device, outputs a result of the control operation to a process, and has a timer unit to be excited at a constant period; and the software part has an information process part, a control process part, and an interrupt control unit to switch over the information process part and control process part one another, in which the interrupt control unit suspends an execution of the information process part to execute the control process part in priority and resume the information process part by switching over to the information process part from the control process part, when the execution of the control process part is terminated.
    Type: Grant
    Filed: January 23, 2009
    Date of Patent: January 10, 2012
    Assignees: Hitachi, Ltd., Hitachi Information & Control Solutions, Ltd., Hitachi Engineering & Services Co., Ltd.
    Inventors: Yusaku Otsuka, Naoya Mashiko, Shin Kokura, Yu Iwasaki, Ryuichi Murakawa, Akira Bando, Wataru Sasaki, Hideyuki Yoshikawa, Masamitsu Kobayashi
  • Patent number: 8035330
    Abstract: The synchronous motor driving apparatus including position sensors provided in the synchronous motor, a current polarity detection circuit for detecting the polarities of the currents in the respective phase windings of the synchronous motor, an inverter driving the synchronous motor, a motor speed calculation unit calculating the rotational speed of the synchronous motor depending on the output signals from the position sensors, a speed control unit outputting a first voltage adjusting component (q-axis current command value Iq*) to cause the rotational speed of the synchronous motor to approach a speed command value and a phase control unit outputting a second voltage adjusting component (d-axis current command value Id*) to cause the phase differences between the phases of the position sensor signals and of the currents in the respective phase windings of the synchronous motor to become a predetermined value.
    Type: Grant
    Filed: October 5, 2010
    Date of Patent: October 11, 2011
    Assignees: Hitachi, Ltd., Hitachi Information & Control Solutions, Ltd.
    Inventors: Daisuke Maeda, Tsunehiro Endo, Hidefumi Shirahama, Kenji Sakurai, Hiroyuki Hasegawa, Mitsuhiro Mishima
  • Patent number: 7873871
    Abstract: A programmable electronic controller in which one central arithmetic processing unit and a plurality of input devices and output devices are connected by means of a parallel bus, the controller being basically configured to activate a self-diagnostic function and a diagnostic test of the input devices and the output devices with an instruction from a microprocessor of the central arithmetic processing unit; and to judge the result with the microprocessor of the central arithmetic processing unit, by using the microprocessor installed in the central arithmetic processing unit also as a processor for tests (diagnostic tests) of the self-diagnostic function of the input devices and output devices and conducting tests of the self-diagnostic function of the plurality of input devices and output devices with the central arithmetic processing unit.
    Type: Grant
    Filed: June 26, 2007
    Date of Patent: January 18, 2011
    Assignees: Hitachi, Ltd., Hitachi Information & Control Solutions, Ltd.
    Inventors: Masakazu Ishikawa, Akira Bandou, Masahiro Shiraishi, Masamitsu Kobayashi, Yasuyuki Furuta, Akihiro Onozuka, Shin Kokura, Eiji Kobayashi, Satoru Funaki, Takashi Umehara, Naoya Mashiko, Yuusuke Seki, Tatsuyuki Ootani
  • Patent number: 7859210
    Abstract: In order to prevent a short circuit of top and bottom arms of a motor driving IC when noise is added to six control signals for controlling six switching elements, there is provided a semiconductor device for driving a motor, being sealed with resin as one package and comprising: six switching elements for driving a three-phase motor; three output terminals for outputting voltages to the three-phase motor; at least one driving circuit for driving the six switching elements; three control signal input terminals; and a function) of generating six control signals for control of the six switching elements based on three control signals inputted through the three control signal input terminals.
    Type: Grant
    Filed: February 1, 2008
    Date of Patent: December 28, 2010
    Assignees: Hitachi, Ltd., Hitachi Information & Control Solutions, Ltd.
    Inventors: Kenji Sakurai, Hiroyuki Hasegawa, Tomoyuki Utsumi, Shoichi Ohozeki, Daisuke Maeda, Mitsuhiro Mishima
  • Patent number: 7839113
    Abstract: The synchronous motor driving apparatus including position sensors provided in the synchronous motor, a current polarity detection circuit for detecting the polarities of the currents in the respective phase windings of the synchronous motor, an inverter driving the synchronous motor, a motor speed calculation unit calculating the rotational speed of the synchronous motor depending on the output signals from the position sensors, a speed control unit outputting a first voltage adjusting component (q-axis current command value Iq*) to cause the rotational speed of the synchronous motor to approach a speed command value and a phase control unit outputting a second voltage adjusting component (d-axis current command value Id*) to cause the phase differences between the phases of the position sensor signals and of the currents in the respective phase windings of the synchronous motor to become a predetermined value.
    Type: Grant
    Filed: January 25, 2008
    Date of Patent: November 23, 2010
    Assignees: Hitachi, Ltd., Hitachi Information & Control Solutions, Ltd.
    Inventors: Daisuke Maeda, Tsunehiro Endo, Hidefumi Shirahama, Kenji Sakurai, Hiroyuki Hasegawa, Mitsuhiro Mishima
  • Patent number: 7692168
    Abstract: The present invention improves the accuracy of therapy by checking in real time whether an spread-out Bragg peak (SOBP) width agrees with a desired width during irradiation with a beam. The device for outputting a charged particle beam includes a charged particle beam generator 1 including a synchrotron 4; a range modulation device such as a range modulation wheel (RMW) 28 which forms a Bragg peak of an ion beam extracted from this charged particle beam generator 1; an irradiation device 16 which is located in the direction of ion beam propagation of this RMW device 28 and includes a dose monitor 31 for detecting a dose of the ion beam; and an SOBP width calculation device 73 which calculates ion beam Bragg peak formed by the RMW device 28 based on a detection value of the dose monitor 31.
    Type: Grant
    Filed: July 6, 2007
    Date of Patent: April 6, 2010
    Assignees: Hitachi, Ltd., Hitachi Information & Control Solutions, Ltd.
    Inventors: Kunio Moriyama, Noriaki Ouchi, Masahiro Tadokoro, Hisataka Fujimaki
  • Patent number: 7555627
    Abstract: Input-output devices are prevented from conducting false output due to faulty operation by providing an input-output control apparatus configured to store input-output values to be used by a processor to conduct arithmetic operation in a mode having a relatively high safety requirement, in a first storage area, store input-output values to be used by the processor to conduct arithmetic operation in a mode having a relatively low safety requirement, in a second storage area, and restrict copying to the first storage area, copying from the first storage area, copying to the second storage area, or copying from the second storage area according to the mode concerning the safety requirement.
    Type: Grant
    Filed: June 30, 2006
    Date of Patent: June 30, 2009
    Assignees: Hitachi, Ltd., Hitachi Information & Control Solutions, Ltd.
    Inventors: Naoya Mashiko, Takashi Umehara, Masamitsu Kobayashi, Hiromichi Endoh, Akihiro Onozuka, Akira Bando, Shin Kokura, Hisao Nagayama, Masakazu Ishikawa, Satoru Funaki, Masahiro Shiraishi
  • Patent number: D569286
    Type: Grant
    Filed: June 25, 2007
    Date of Patent: May 20, 2008
    Assignee: Hitachi Information & Control Solutions, Ltd.
    Inventors: Hiroyuki Noda, Kunihito Kawamura, Kichiro Kikuchi, Hiroto Nakai, Hisao Nakayama
  • Patent number: D602021
    Type: Grant
    Filed: November 25, 2008
    Date of Patent: October 13, 2009
    Assignee: Hitachi Information & Control Solutions, Ltd.
    Inventors: Hiroyuki Noda, Kichiro Kikuchi, Hiroto Nakai, Hisao Nakayama