Patents Assigned to Hitachi Keiyo Engineering Co., Ltd.
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Patent number: 7115039Abstract: A contents distribution system for a simulation ride system has a seat rocking unit, a video unit, an acoustic unit, and a simulation ride control apparatus. The simulation ride control apparatus has the simulation ride system controlling operations of the seat rocking unit, the video unit, and the acoustic unit by using content data, and a distribution apparatus for a ride contents administration center. The distribution apparatus for the ride contents administration center distributes the content data and the simulation ride control apparatus receives the distributed content data.Type: GrantFiled: August 31, 2001Date of Patent: October 3, 2006Assignees: Hitachi, Ltd., Hitachi Keiyo Engineering Co., Ltd.Inventors: Yuji Matsuda, Tsukasa Shiina, Masayuki Oshiro, Kazuhide Ebine, Kenjiro Fujii, Katsumasa Nagai
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Patent number: 6675167Abstract: An equipment management system structured by a monitoring apparatus to monitor equipment of a facility being monitored and retrieve operation data, a database apparatus in which the operation data retrieved by the monitoring apparatus is recorded, and a database client apparatus to send and receive information to and from the database apparatus via a network, display the data recorded in the database apparatus, and enter data. The database apparatus records maintenance reference values for the equipment of the facility being monitored and the monitoring apparatus or database client apparatus outputs a display or printout prompting an execution of maintenance work when the operation data is in excess of or close to the maintenance reference values.Type: GrantFiled: March 19, 2001Date of Patent: January 6, 2004Assignees: Hitachi, Ltd., Hitachi Keiyo Engineering Co., Ltd.Inventors: Ichiro Takahashi, Seigo Kurokawa, Tatsuhiko Asano, Hiromitsu Kaneko
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Patent number: 6604061Abstract: An equipment management system structured by a monitoring apparatus to monitor equipment of a facility being monitored and retrieve operation data, a database apparatus in which the operation data retrieved by the monitoring apparatus is recorded, and a database client apparatus to send and receive information to and from the database apparatus via a network, display the data recorded in the database apparatus, and enter data. The database apparatus records maintenance reference values for the equipment of the facility being monitored and the monitoring apparatus or database client apparatus outputs a display or printout prompting an execution of maintenance work when the operation data is in excess of or close to the maintenance reference values.Type: GrantFiled: February 28, 2002Date of Patent: August 5, 2003Assignees: Hitachi, Ltd., Hitachi Keiyo Engineering Co., Ltd.Inventors: Ichiro Takahashi, Seigo Kurokawa, Tatsuhiko Asano, Hiromitsu Kaneko
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Patent number: 6486548Abstract: A semiconductor module in which a lead electrode is integrally formed with or pressed into resin separated from a resin case, and a connector securing a pad for bonding a metal wire to the lead electrode is bonded to a substrate with a power semiconductor element mounted thereon by an adhesive, and the like in a similar manner as the module case. According to the present invention, an electrode can be disposed in an appropriate position in the semiconductor module, and the scope of the free layout is enhanced.Type: GrantFiled: April 20, 2000Date of Patent: November 26, 2002Assignees: Hitachi, Ltd., Hitachi Keiyo Engineering Co., Ltd.Inventors: Kinya Nakatsu, Toshio Ogawa, Akihiro Tamba, Hiroshi Fujii, Hiroyuki Tomita, Norinaga Suzuki, Kazuhiro Ito, Masahiro Hiraga
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Patent number: 6421279Abstract: A semiconductor file system features a first nonvolatile memory electrically erasable, a second nonvolatile memory not electrically erasable, a volatile memory, a controller, and a control section which controls the controller wherein a physical address corresponding to a logical address specified from an external system is accessed. The first nonvolatile memory stores data for the external system to perform operations, first management information indicating correspondence between physical and logical addresses, and second management information indicating a state of the first nonvolatile memory. The second nonvolatile memory previously stores interface information. The controller determines a physical sector address.Type: GrantFiled: August 13, 2001Date of Patent: July 16, 2002Assignees: Hitachi, Ltd., Hitachi Keiyo Engineering Co., Ltd., Hitachi USLI Engineering Corp.Inventors: Tsunehiro Tobita, Jun Kitahara, Takashi Tsunehiro, Kunihiro Katayama, Ryuichi Hattori, Yukihiro Seki, Hajime Yamagami, Takashi Totsuka, Takeshi Wada, Yosio Takaya, Manabu Saito, Kenichi Kaki, Takao Okubo, Takashi Kikuchi, Masamichi Kishi, Takeshi Suzuki, Shigeru Kadowaki
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Patent number: 6413090Abstract: A simulation rider transporting apparatus includes a seat having means for constraining an attitude of a rider mounted on a first base and having a second base positioned under the first base. Elevation means for elevating the first base include two cranks which are arranged opposite to each other between the first and the second base. Each of the cranks has crank arms with each crank arm having one end coupled to the second base. A crank rod is provided for coupling the other end of each crank arm to the first base. Drive means are provided for changing a relative angle between the two crank arms to a predetermined value and for holding the changed relative angle.Type: GrantFiled: March 26, 1999Date of Patent: July 2, 2002Assignees: Hitachi, Ltd., Hitachi Keiyo Engineering Co., Ltd.Inventors: Tsukasa Shiina, Minoru Katoh, Masayuki Oshiro, Takayuki Kamiya, Hiroshi Sakairi, Masami Otomo, Kenji Seino
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Patent number: 6409509Abstract: A VR motion producing apparatus includes a dynamic object to be controlled, a motion base having a finite stroke and motion model converting means for converting in a real time a motion model of a dynamic object to be controlled which is moved within a virtual reality space constituted by computer graphics into another motion model of the motion base having a finite stroke. The motion model converting means includes means for converting coordinate data of the motion model of a dynamic object to be controlled into coordinate data of the motion model of the motion base.Type: GrantFiled: January 26, 2001Date of Patent: June 25, 2002Assignees: Hitachi, Ltd., Hitachi Keiyo Engineering Co., Ltd.Inventors: Tsukasa Shiina, Minoru Katoh, Masayuki Oshiro, Takayuki Kamiya, Hiroshi Sakairi, Masami Otomo, Kenji Seino
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Patent number: 6336811Abstract: A VR motion producing apparatus includes a reception unit for receiving a presently projected picture frame No. from a picture apparatus; a detection unit for detecting a frame No. of operation data of a motion base presently executed by a motion base; a difference unit for comparing the picture frame No. with the motion frame No. to calculate a difference between them; a calculation unit for calculating an operation velocity of a motion base so as to correct this difference value; and a synchronization unit for reducing the difference between the picture frame No. and the motion frame No. for operating the motion base from the calculated velocity.Type: GrantFiled: January 26, 2001Date of Patent: January 8, 2002Assignees: Hitachi, Ltd., Hitachi Keiyo Engineering Co., Ltd.Inventors: Tsukasa Shiina, Minoru Katoh, Masayuki Oshiro, Takayuki Kamiya, Hiroshi Sakairi, Masami Otomo, Kenji Seino
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Patent number: 6275436Abstract: A control method and system when a flash memory is used. as a semiconductor disk or a main memory in an information processing system. A semiconductor file system comprises a first nonvolatile memory electrically erasable, a second nonvolatile memory not electrically erasable, a volatile memory, a controller which controls the memories, and a control section which controls the controller wherein a physical address corresponding to a logical address specified from an external system is accessed. The first nonvolatile memory stores data for the external system to perform operations, first management information indicating the correspondence between physical addresses at which the data is stored and logical addresses, and second management information indicating a state of the first nonvolatile memory. The second nonvolatile memory previously stores interface information required for inputting and outputting the data from and to the external system and read-only data of the data.Type: GrantFiled: May 23, 2000Date of Patent: August 14, 2001Assignees: Hitachi, LTD, Hitachi Keiyo Engineering Co., Ltd., Hitachi ULSI Engineering Corp.Inventors: Tsunehiro Tobita, Jun Kitahara, Takashi Tsunehiro, Kunihiro Katayama, Ryuichi Hattori, Yukihiro Seki, Hajime Yamagami, Takashi Totsuka, Takeshi Wada, Yosio Takaya, Manabu Saito, Kenichi Kaki, Takao Okubo, Takashi Kikuchi, Masamichi Kishi, Takeshi Suzuki, Shigeru Kadowaki
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Patent number: 6194856Abstract: In a controller, for use in an electric motor, which self-contains a current control system, a conducting portion of a feedback element from a current detector up to a summing point, and a conducting portion of a forward element from the summing point for the current control up to a gate terminal of each of switching devices are mounted in a power module to be hermetically encapsulated without being exposed to the external ambient atmosphere. The distributed processing is executed in the two portions, i.e., a current control loop, and a position control unit, a velocity control unit and an interface processing unit other than the current control loop. Therefore, the current control loop including the current feedback portion is constituted by another sub-microprocessor to be mounted together with the associated devices in a power module which is molded with resin such as epoxy resin.Type: GrantFiled: January 24, 2000Date of Patent: February 27, 2001Assignees: Hitachi, Ltd., Hitachi Keiyo Engineering Co., Ltd.Inventors: Sumio Kobayashi, Makoto Takase, Hisakazu Ninomiya
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Patent number: 6169670Abstract: An inverter apparatus operatable over an extended output frequency range having an increased upper limit with error contained in the output voltage being suppressed by eliminating dispersions of PWM pulse signals. A PWM command pulse signal and an output voltage detection signal derived from the output of the inverter are compared straightforwardly with each other for determining difference therebetween on the basis of which error contained in the inverter output voltage is canceled. An isolation device for isolating electrically a low-voltage-rated control circuitry and a high-voltage-rated main circuitry from each other is inserted between a PWM command pulse signal generating circuit and a pulse width correcting circuit.Type: GrantFiled: April 5, 2000Date of Patent: January 2, 2001Assignees: Hitachi, Ltd., Hitachi Keiyo Engineering Co., Ltd.Inventors: Tomofumi Okubo, Masahiro Hiragi, Mutsuo Tokashiki
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Patent number: 6078520Abstract: A control method and system when a flash memory is used as a semiconductor disk or a main memory in an information processing system. A semiconductor file system comprises a first nonvolatile memory electrically erasable, a second nonvolatile memory not electrically erasable, a volatile memory, a controller which controls the memories, and a control section which controls the controller wherein a physical address corresponding to a logical address specified from an external system is accessed. The first nonvolatile memory stores data for the external system to perform operations, first management information indicating the correspondence between physical addresses at which the data is stored and logical addresses, and second management information indicating a state of the first nonvolatile memory. The second nonvolatile memory previously stores interface information required for inputting and outputting the data from and to the external system and read-only data of the data.Type: GrantFiled: July 21, 1999Date of Patent: June 20, 2000Assignees: Hitachi, Ltd., Hitachi Keiyo Engineering Co., Ltd., Hitachi ULSIInventors: Tsunehiro Tobita, Jun Kitahara, Takashi Tsunehiro, Kunihiro Katayama, Ryuichi Hattori, Yukihiro Seki, Hajime Yamagami, Takashi Totsuka, Takeshi Wada, Yosio Takaya, Manabu Saito, Kenichi Kaki, Takao Okubo, Takashi Kikuchi, Masamichi Kishi, Takeshi Suzuki, Shigeru Kadowaki
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Patent number: 5973964Abstract: A control method and system when a flash memory is used as a semiconductor disk or a main memory in an information processing system. A semiconductor file system comprises a first nonvolatile memory electrically erasable, a second nonvolatile memory not electrically erasable, a volatile memory, a controller which controls the memories, and a control section which controls the controller wherein a physical address corresponding to a logical address specified from an external system is accessed. The first nonvolatile memory stores data for the external system to perform operations, first management information indicating the correspondence between physical addresses at which the data is stored and logical addresses, and second management information indicating a state of the first nonvolatile memory. The second nonvolatile memory previously stores interface information required for inputting and outputting the data from and to the external system and read-only data of the data.Type: GrantFiled: October 30, 1998Date of Patent: October 26, 1999Assignees: Hitachi, Ltd., Hitachi Keiyo Engineering Co., Ltd., Hitachi ULSI Engineering Co., Ltd.Inventors: Tsunehiro Tobita, Jun Kitahara, Takashi Tsunehiro, Kunihiro Katayama, Ryuichi Hattori, Yukihiro Seki, Hajime Yamagami, Takashi Totsuka, Takeshi Wada, Yosio Takaya, Manabu Saito, Kenichi Kaki, Takao Okubo, Takashi Kikuchi, Masamichi Kishi, Takeshi Suzuki, Shigeru Kadowaki
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Patent number: 5949663Abstract: Objects of the present invention are to provide an inverter apparatus in which the specification thereof can be readily changed without changing an inverter basic unit, and to provide an inverter apparatus in which an inverter basic unit and an I/O block unit can be readily separated and the number of degrees of freedom of installation can be increased. An inverter apparatus of the present invention is constituted by an inverter basic unit and an I/O block unit which is connected to the inverter basic unit separately therefrom. The inverter basic unit is constituted by a power module which includes a DC/AC converter and a controller including a microcomputer for managing the DC/AC converter. The I/O block unit is constructed in the form of an I/O block unit which includes an input/output interface unit having signal connection terminals.Type: GrantFiled: June 18, 1998Date of Patent: September 7, 1999Assignees: Hitachi, Ltd., Hitachi Keiyo Engineering Co., Ltd.Inventors: Tsunehiro Endo, Kinya Nakatsu, Hiroshi Fujii, Norinaga Suzuki, Masahiro Hiraga
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Patent number: 5862083Abstract: A control method and system when a flash memory is used as a semiconductor disk or a main memory in an information processing system. A semiconductor file system comprises a first nonvolatile memory electrically erasable, a second nonvolatile memory not electrically erasable, a volatile memory, a controller which controls the memories, and a control section which controls the controller wherein a physical address corresponding to a logical address specified from an external system is accessed. The first nonvolatile memory stores data for the external system to perform operations, first management information indicating the correspondence between physical addresses at which the data is stored and logical addresses, and second management information indicating a state of the first nonvolatile memory. The second nonvolatile memory previously stores interface information required for inputting and outputting the data from and to the external system and read-only data of the data.Type: GrantFiled: April 30, 1996Date of Patent: January 19, 1999Assignees: Hitachi, Ltd., Hitachi Keiyo Engineering Co., Ltd., Hitachi ULSI Engineering Corp.Inventors: Tsunehiro Tobita, Jun Kitahara, Takashi Tsunehiro, Kunihiro Katayama, Ryuichi Hattori, Yukihiro Seki, Hajime Yamagami, Takashi Totsuka, Takeshi Wada, Yosio Takaya, Manabu Saito, Kenichi Kaki, Takao Okubo, Takashi Kikuchi, Masamichi Kishi, Takeshi Suzuki, Shigeru Kadowaki
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Patent number: 5557774Abstract: Test environmental programs are prepared using the following steps: Upon application of H/W specification information containing information on the system architecture, a guidance is displayed based on the H/W specification information and the user is caused to input subsystem definition information. The H/W specification information and the subsystem definition table are related to each other to prepare the specification description of system architecture, which is used together with the simulator in a simulator library to generate test environment programs according to a testee designation. In the application-specific hardware simulator, a hardware simulation model simulating the I/O device behavior is prepared as follows: An internal connection analysis table and a definition table defining various system architectures are prepared from the hardware description information describing the I/O device hardware specification in the specification description language.Type: GrantFiled: March 17, 1994Date of Patent: September 17, 1996Assignees: Hitachi, Ltd., Hitachi Keiyo Engineering Co., Ltd.Inventors: Jun Shimabukuro, Yuji Nagamatsu, Yoshimi Ikeuchi, Kazuyuki Kondo
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Patent number: 5530673Abstract: A control method and system when a flash memory is used as a semiconductor disk or a main memory in an information processing system. A semiconductor file system comprises a first nonvolatile memory electrically erasable, a second nonvolatile memory not electrically erasable, a volatile memory, a controller which controls the memories, and a control section which controls the controller wherein a physical address corresponding to a logical address specified from an external system is accessed. The first nonvolatile memory stores data for the external system to perform operations, first management information indicating the correspondence between physical addresses at which the data is stored and logical addresses, and second management information indicating a state of the first nonvolatile memory. The second nonvolatile memory previously stores interface information required for inputting and outputting the data from and to the external system and read-only data of the data.Type: GrantFiled: April 8, 1994Date of Patent: June 25, 1996Assignees: Hitachi, Ltd., Hitachi Keiyo Engineering Co., Ltd., Hitachi ULSI Engineering Corp.Inventors: Tsunehiro Tobita, Jun Kitahara, Takashi Tsunehiro, Kunihiro Katayama, Ryuichi Hattori, Yukihiro Seki, Hajime Yamagami, Takashi Totsuka, Takeshi Wada, Yosio Takaya, Manabu Saito, Kenichi Kaki, Takao Okubo, Takashi Kikuchi, Masamichi Kishi, Takeshi Suzuki, Shigeru Kadowaki
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Patent number: 5481664Abstract: For each media information element constituting a display screen image in a multimedia system, main data and attribute data are stored in a storage. After the user copies a media information element from a screen layout to another screen layout, until an attribute of the media information element is altered in either one of the layouts, the main data and/or the attribute data of the media information element is not copied in the storage of the system. Moreover, when the user varies an attribute of a media information element in one of the layouts, only attribute data of the media information element is changed in the storage. The media information includes music pieces and voices in addition to characters and graphic images.Type: GrantFiled: January 19, 1993Date of Patent: January 2, 1996Assignees: Hitachi, Ltd., Hitachi Keiyo Engineering Co., Ltd.Inventors: Masaaki Hiroya, Masayuki Saito, Hiroyuki Takagi
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Patent number: 5307501Abstract: In a data processor including an input device for inputting commands and data, a central processing unit for executing processing in accordance with the input command or data from the input device and a display device for displaying the input command or data from the input device or the message generated by the central processing unit, the present invention discloses a data processor comprising an automatic input data memory for storing a trigger data to be displayed on the display device and automatic input data corresponding to the trigger data, a judgement device for judging whether or not the display of the display device is in agreement with the trigger data stored in the automatic input data memory, and an automatic input device for outputting the automatic input data corresponding to the trigger data from the automatic input data memory to the central processing unit in accordance with the result of the judgement operation performed by the judgement device.Type: GrantFiled: July 30, 1992Date of Patent: April 26, 1994Assignees: Hitachi Keiyo Engineering Co., Ltd., Hitachi, Ltd.Inventor: Kazuo Yuge
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Patent number: D429401Type: GrantFiled: September 29, 1999Date of Patent: August 8, 2000Assignee: Hitachi Keiyo Engineering Co., Ltd.Inventors: Yoko Sato, Yukio Kuroiwa, Tohru Higashihara, Shinichi Sarugaku, Akira Fujishiro, Kazuyuki Terashima