Patents Assigned to Hitachi, Ltd.
  • Publication number: 20190084548
    Abstract: The present invention relates to a method and an apparatus for determining brake wear at a vehicle. According to the present invention, the brake wear estimation includes determining, for each of one or more time periods during which a brake of the vehicle is actuated, a speed of the vehicle at a start time of the respective time period and a speed change parameter indicative of a change of speed of the vehicle during the respective time period; and determining, for each of the one or more time periods, a respective brake wear parameter indicative of brake wear at one or more brakes of the vehicle during the respective time period based on the speed of the vehicle at the start time of the respective time period, the speed change parameter indicative of the change of speed of the vehicle during the respective time period, and the mass or weight of the vehicle.
    Type: Application
    Filed: January 24, 2018
    Publication date: March 21, 2019
    Applicant: HITACHI, LTD.
    Inventor: Anthony OHAZULIKE
  • Publication number: 20190086362
    Abstract: A traditional nanopore DNA sequencing method has a problem in that a signal analysis error may occur when a signal variation reflecting fluctuation in a base current is contained in a signal variation in a signal analysis. An electrolyte solution for biomolecule assays, containing D2O as a solvent, and/or containing an electrolyte that has Cs and Na, Na alone, Na and Li, or Li alone as a cation species in the electrolyte solution, or trishydroxyaminomethane, or a combination thereof is used in formation of a nanopore or in measurement.
    Type: Application
    Filed: March 7, 2017
    Publication date: March 21, 2019
    Applicant: Hitachi, Ltd.
    Inventors: Rena AKAHORI, Yusuke GOTO, Kazuma MATSUI, Takahide YOKOI
  • Publication number: 20190087116
    Abstract: A management apparatus, which is configured to manage at least one storage system, includes a processor and a memory. Each of the at least one storage apparatus includes a plurality of volumes, each of which stores at least one OS. The processor is configured to: determine, for each of the plurality of volumes, an OS type and version of a representative OS of the each of the plurality of volumes; select, from among the plurality of volumes, a plurality of volumes having representative OSes that share the same OS type and major version; and include the selected plurality of volumes in one deduplication group made up of volumes among which deduplication is to be executed.
    Type: Application
    Filed: June 3, 2016
    Publication date: March 21, 2019
    Applicant: HITACHI, LTD.
    Inventors: Atsushi TSUDA, Masakazu KOBAYASHI, Yuichiro NAGASHIMA, Tetsuya UEHARA, Yohei TSUJIMOTO
  • Patent number: 10234360
    Abstract: A degradation cause estimation device is provided with a degradation detector for detecting the amount of degradation undergone by a device, a state observation device for detecting observation values for internal portions, values observed from outside, or device control and operation information, a degradation section detector for detecting a section undergoing degradation using the output values of the degradation detector, and a cause estimator for estimating the cause of the degradation using the device state observations for the degradation section, and outputs the cause for the degradation section.
    Type: Grant
    Filed: July 30, 2014
    Date of Patent: March 19, 2019
    Assignee: HITACHI, LTD.
    Inventors: Munetoshi Unuma, Takashi Saeki, Shinya Yuda
  • Patent number: 10234355
    Abstract: A leakage oil detection system includes a measurement device including a light source that causes a measured object which includes a leakage oil attachment part to be irradiated with ultraviolet rays, and an imaging device that detects fluorescence emitted from the leakage oil attachment part which is irradiated with the ultraviolet rays, and performs imaging on the measured object; and an analysis device that includes a driving control unit that controls operations of the light source and the imaging device, a recording unit that records an imaged image of the measured object which is imaged by the imaging device, and an image processing unit that calls the imaged image which is recorded in the recording unit and performs an image process to detect leakage oil.
    Type: Grant
    Filed: July 8, 2016
    Date of Patent: March 19, 2019
    Assignee: Hitachi, Ltd.
    Inventors: Li Lu, Satoshi Ichimura, Tomohiro Moriyama, Jun Nukaga, Akira Yamagishi, Yasutomo Saito
  • Patent number: 10235005
    Abstract: Pursuant to the increase in the number of objects to be managed and the complication of relations of the objects to be managed, the current condition is that the visibility of the GUI of management software is deteriorating. As one such current condition, there is a problem in that the display name of equipment to be managed on the GUI cannot be entirely displayed depending on the screen. Thus, the present invention improves the readability on the GUI by changing the display name according to the objective of the administrator by using a label in which the display name is divided into morphemes and the priority assigned thereto, as well as using topology information, and fitting the display name within the display area prepared on the screen.
    Type: Grant
    Filed: March 27, 2015
    Date of Patent: March 19, 2019
    Assignee: Hitachi, Ltd.
    Inventors: Keita Shimada, Mineyoshi Masuda
  • Patent number: 10235282
    Abstract: An allocation request for requesting allocation of a target virtual area with respect to target data issued to a system program includes a target ID corresponding to the target data. In response to the allocation request, whether or not the target ID is included in data map information is determined. When it is included in the data map information, the system program determines whether or not a target physical area is included in a storage apparatus. When the target physical area is included in the storage apparatus, the system program reserves a free area in a non-volatile memory as a target memory area, copies target data stored in the storage apparatus to the target memory area, changes the target physical area in the data map information to the target memory area, and writes an association between the target virtual area and the target memory area into the volatile memory.
    Type: Grant
    Filed: June 1, 2015
    Date of Patent: March 19, 2019
    Assignee: Hitachi, Ltd.
    Inventors: Keiichi Matsuzawa, Hitoshi Kamei
  • Patent number: 10237159
    Abstract: A large-scale computer system including a plurality of nodes is controlled to improve its system performance without aggregating data in a single site. There is provided a computer system including a plurality of computers, wherein a processor: detects a trigger to calculate a control value for controlling a process to be performed by the computer; identifies a target computer for which an evaluation value is obtained; calculates the evaluation value of its own computer; obtains the evaluation value from the target computer; calculates a first point using at least one of the evaluation value of its own computer and the evaluation value of the target computer; obtains a second point from the target computer; calculates the control value using the first point and the second point; and controls the process performed by the computer based on the control value.
    Type: Grant
    Filed: May 12, 2017
    Date of Patent: March 19, 2019
    Assignee: Hitachi, Ltd.
    Inventors: Seiji Miura, Junichi Miyakoshi
  • Patent number: 10234387
    Abstract: The invention optically analyzes a component in a sample having a material suspended. An optical analysis system that irradiates a liquid sample with light and analyzes a component of the sample using transmitted light transmitted through the sample includes a container accommodating the sample and an ultrasonic irradiation unit irradiating an ultrasonic wave for exciting the sample. The container includes a pair of light transmission wall portions between which the sample is disposed and which has light transmissivity, and one of the light transmission wall portions and the other of the light transmission wall portions are disposed to be separated from each other at a distance shorter than a wavelength of the ultrasonic wave.
    Type: Grant
    Filed: December 6, 2017
    Date of Patent: March 19, 2019
    Assignee: Hitachi, Ltd.
    Inventors: Takuya Kanbayashi, Shinichi Taniguchi, Akihiro Nojima, Yusuke Kaga
  • Patent number: 10235448
    Abstract: A search string including a location name is received from a client terminal, the search string is broken down, related data of each broken down (BD) information is acquired from a website, each BD information and its related data are stored in a storage unit in association with each other. For each BD information, it is determined whether a record of the related data includes a plurality of pieces of latitude/longitude information. A mesh display flag or a pin display flag is set to the BD information in the storage unit based on a result of the determination. Polygon display processing, mesh display processing, or pin display processing on a map is executed on the related data of the BD information based on a value of the mesh display flag and a value of the pin display flag, and a result of the processing is transmitted to the client terminal.
    Type: Grant
    Filed: March 22, 2016
    Date of Patent: March 19, 2019
    Assignee: HITACHI, LTD.
    Inventors: Daisuke Kitou, Satoshi Yashiro, Kei Kitahara
  • Patent number: 10238015
    Abstract: Technology leading to a size reduction in a power conversion apparatus comprising a cooling function and technology relating to enhancing productivity and enhancing reliability necessary for commercial production are provided. Series circuits comprising an upper arm and lower arm of an inverter circuit are built in a single semiconductor module 500. The semiconductor module has cooling metal on two sides. An upper arm semiconductor chip and lower arm semiconductor chip are wedged between the cooling metals. The semiconductor module is inserted inside a channel case main unit 214. A DC positive electrode terminal 532, a DC negative electrode terminal 572, and an alternating current terminal 582 of a semiconductor chip are disposed in the semiconductor module. The DC terminals 532 and 572 are electrically connected with a terminal of a capacitor module. The alternating current terminal 582 is electrically connected with a motor generator via an AC connector.
    Type: Grant
    Filed: December 22, 2016
    Date of Patent: March 19, 2019
    Assignee: HITACHI, LTD.
    Inventors: Takeshi Tokuyama, Kinya Nakatsu, Ryuichi Saito
  • Patent number: 10235270
    Abstract: In testing a component-set whole process which includes a plurality of components and in which the order of execution of the plurality of components is defined, a computer system exports, to a storage resource, an input package for at least one component to be executed. Each of the plurality of components is a module of a significant process as a set of one or more processing steps and independent of any other components. Each input package includes an input value of a component that corresponds to the input package. The computer system imports an exported input package of a component to be debugged into the component to be debugged in order to execute the component to be debugged, without executing a component the order of which precedes the order N (where N is a natural number) of the component to be debugged.
    Type: Grant
    Filed: October 26, 2015
    Date of Patent: March 19, 2019
    Assignee: HITACHI LTD.
    Inventors: Hiroyuki Yamada, Hirokazu Taniyama, Masashi Nakaoka, Masatoshi Yoshida, Yuki Shimizu
  • Patent number: 10236370
    Abstract: An object of the present invention is to suppress energization deterioration due to crystal defects in a semiconductor device including SiC-MOSFET. To solve this problem, a semiconductor device of the present invention includes: an n?-type epitaxial layer formed on a main surface of an n+-type SiC substrate; a p-type termination region that is annularly formed in the n?-type epitaxial layer outside an active region; and an n-type hole annihilation region annularly formed in the n?-type epitaxial layer outside the p-type termination region, apart from the p-type termination region. Then, the n-type hole annihilation region has a first end surface facing the p-type termination region, as well as a second end surface on the opposite side of the first end surface.
    Type: Grant
    Filed: September 15, 2015
    Date of Patent: March 19, 2019
    Assignee: Hitachi, Ltd.
    Inventors: Yuki Mori, Akio Shima
  • Publication number: 20190080687
    Abstract: The invention is directed to a learning-type interactive device which performs voice dialogue with a user and accumulates a result of the voice dialogue as knowledge including: a voice recognition portion which performs voice recognition on an acquired uttered voice of the user and converts the voice into text; an intention understanding portion which analyzes an utterance intention from the text voice-recognized by the voice recognition portion with reference to intention understanding model data learned from intention understanding learning data; an answer generation portion which refers to a QA DB and generates an answer text from the utterance intention analyzed by the intention understanding portion, a knowledge extraction portion which extracts knowledge from the text voice-recognized by the voice recognition portion, the utterance intention, and the answer text, and a knowledge classification portion which classifies the knowledge extracted by the knowledge extraction portion according to characteristi
    Type: Application
    Filed: July 17, 2018
    Publication date: March 14, 2019
    Applicant: HITACHI, LTD.
    Inventor: Kenji Nagamatsu
  • Patent number: 10229742
    Abstract: A flash memory controller is configured to hold a read pattern defining an order of selection of read options specifying a parameter value for a read from the flash memory chip. The flash memory controller is configured to execute error correction on data read from the flash memory chip in accordance with the read command. The flash memory controller is configured to designate a next read option specified in the read pattern to read the data from the flash memory chip in a case where all errors in the read data are not corrected by the error correction.
    Type: Grant
    Filed: June 19, 2015
    Date of Patent: March 12, 2019
    Assignee: Hitachi, Ltd.
    Inventors: Yohei Hazama, Junji Ogawa, Kenta Ninose
  • Patent number: 10229062
    Abstract: A storage system includes a plurality of controllers each including a processor module and a memory, and a relay unit to relay a communication between the processor modules. The relay unit executes assignment determination to determine one of the processor module of a first controller and the processor module of a second controller is a processor module processing a command stored in the memory. The first controller includes memory storing the command, and the second controller is any of the controllers other than the first controller. When the relay unit determines the command of the processor module of the first controller, the relay unit notifies storage location information of the command to the processor module of the first controller, and when the relay unit determines the command to be processed by the processor module of the second controller, the relay unit transfer the command to the second controller.
    Type: Grant
    Filed: July 11, 2014
    Date of Patent: March 12, 2019
    Assignee: HITACHI, LTD.
    Inventors: Makio Mizuno, Norio Shimozono, Katsuya Tanaka
  • Patent number: 10229021
    Abstract: Virtual first logical volumes are provided to a host, a virtual second logical volume correlated with any one of the first logical volumes is created in a storage node in correlation with a storage control module disposed in the storage node, a correspondence relationship between the first and second logical volumes is managed as mapping information, a storage node which is an assigning distribution of an I/O request is specified on the basis of the mapping information in a case where the I/O request in which the first logical volume is designated as an I/O destination is given from the host, the I/O request is assigned to the storage control module of its own node in a case where the specified storage node is its own node, and the I/O request is assigned to another storage node in a case where the specified storage node is another storage node.
    Type: Grant
    Filed: March 9, 2018
    Date of Patent: March 12, 2019
    Assignee: HITACHI, LTD.
    Inventors: Kouji Iwamitsu, Takuya Ogusu, Keisuke Suzuki, Masayuki Gomyo, Shinri Inoue
  • Patent number: 10229331
    Abstract: A three-dimensional information calculation device includes a first image input unit which continuously acquires a plurality of images from a first imaging unit, a second image input unit which continuously acquires a plurality of images from a second imaging unit, an object candidate region extraction unit which extracts an object candidate region where an object exists by using two or more images acquired by the first image input unit at different times, a region future estimation unit which estimates a future position of the object candidate region relative to an image capture range of the first imaging unit based on a position of the extracted object candidate region on a plurality of images, and a three-dimensional information calculation unit which calculates three-dimensional information of the object candidate region, in which three-dimensional information is deemed required based on the future position estimated by the region future estimation unit, based on corresponding points of the object candida
    Type: Grant
    Filed: January 16, 2015
    Date of Patent: March 12, 2019
    Assignee: Hitachi, Ltd.
    Inventor: Yoshitaka Hiramatsu
  • Patent number: 10229799
    Abstract: A switchgear driving device has a rod coupled to a movable electrode; an operation piston connected to the rod; and an operation cylinder in which an operation piston slides. A main control valve controls the pressure of the hydraulic oil in the operation cylinder. A turning-on pressure accumulation piston slides inside a turning-on pressure accumulation chamber; and a turning-on pressure accumulation spring imparts a driving force to the turning-on pressure accumulation piston to pressurize the hydraulic oil within the turning-on pressure accumulation chamber. A turning-off pressure accumulation piston slides inside a turning-off pressure accumulation chamber. A turning-off pressure accumulation spring imparts a driving force to the turning-off pressure accumulation piston to pressurize the hydraulic oil in the turning-off pressure accumulation chamber.
    Type: Grant
    Filed: February 10, 2016
    Date of Patent: March 12, 2019
    Assignee: Hitachi, Ltd.
    Inventors: Shinji Seto, Daisuke Ebisawa, Hiroaki Hashimoto
  • Patent number: 10229974
    Abstract: To solve a problem of realizing a large current and highly reliable power semiconductor device while shrinking a unit cell. A semiconductor device according to the present invention includes a plurality of p-type body regions extending in a first direction. The semiconductor device further includes: a JFET region formed to extend in the first direction between p-type body regions which are adjacent to each other in a second direction orthogonal to the first direction; an n+-type source region formed to extend in the first direction within a p-type body region and separate from an end side surface of the p-type body; and a channel region formed to extend in the first direction and in a top layer portion of a p-type body region between an end side surface of the p-type body region and an end side surface of an n+-type source region.
    Type: Grant
    Filed: May 18, 2015
    Date of Patent: March 12, 2019
    Assignee: HITACHI, LTD.
    Inventors: Mieko Matsumura, Junichi Sakano, Naoki Tega, Yuki Mori, Haruka Shimizu, Keisuke Kobayashi