Patents Assigned to Hitachi., Ltd. and
  • Patent number: 5932883
    Abstract: In order to implant an ion beam on wafers with low contamination, especially in a large capacity ion implanter for implanting for a long time, a rotating holder 1 shaped like a cylinder or a circular cone is provided, and the wafers 2 are arranged inside of the rotating holder 1 so as to be fixed firmly by a centrifugal force acting on the wafers. Thereby, the wafers are implanted with low contamination, because the periphery of the wafer is not supported by any stopper which may otherwise be sputtered and cause contamination.
    Type: Grant
    Filed: July 1, 1997
    Date of Patent: August 3, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Isao Hashimoto, Kazuo Mera
  • Patent number: 5932096
    Abstract: An improved apparatus for removing magnetic material from a flowing fluid such as water by magnetic separation has a single set of electromagnets which are used with a plurality of magnetic filters for continuous magnetic separation operation alternately without obstructing the flow of the fluid being processed. A high-gradient magnetic filter arrangement which passes through a magnetic field generated by the magnets is made up of at least two magnetic filters separated by a watertight partition. When the fluid being processed is flowing through one of the magnetic filters, the other filter is removed from the flow of the fluid into a magnetic filter housing which is separated from the fluid flow through the magnetic filter by means of partitions. Backwashing of this other magnetic filter is carried out while purification of the fluid being processed by the former magnetic filter continues uninterrupted.
    Type: Grant
    Filed: September 18, 1997
    Date of Patent: August 3, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Norihide Saho, Hisashi Isogami, Minoru Morita, Fumitaka Handa, Katsuhiko Asano
  • Patent number: 5932880
    Abstract: A scintillator device and an image pickup apparatus using the scintillator, in which the scintillator for converting an input particle or electron beam image into an optical image is applied with a voltage between electrodes formed at the input plane of the electron beam and the output plane of scintillation. This voltage generates an electric field in the scintillator so that scattering of a charged particle beam in the scintillator is prevented and the resolution and S/N ratio can be improved while retaining a large amount of scintillation. Accordingly, the shift amount of low energy charged particle beams from the incident axis, which greatly influences degradation of the resolution and S/N ratio, can be suppressed.
    Type: Grant
    Filed: May 5, 1997
    Date of Patent: August 3, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Masanari Koguchi, Hiroshi Kakibayashi, Tetsuya Ooshima, Kenji Sameshima, Tatsuo Makishima, Keiichi Kanehori, Hiroyuki Shinada
  • Patent number: 5933344
    Abstract: Two up-counters and two down-counters having a time difference corresponding to a dead time are provided to realize an up-down symmetric count, such that the up-counters and the down-counters are made to count the lower limit and the upper limit (a 1/2 period+the dead time), the up-counter for counting a relatively large value and the down-counter for counting a relatively large value are made to contact at the upper limit, the up-counter for counting a relatively small value and the down-counter for counting a relatively small value are made to intersect at a count value corresponding to the 1/2 period, the up-counter for counting the relatively large value and the down-counter for counting the relatively large value are made to intersect at the count value corresponding to the dead time, and the up-counter for counting the relatively small value and the down-counter for counting the relatively small value are made to contact at the lower limit.
    Type: Grant
    Filed: March 13, 1996
    Date of Patent: August 3, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Naoki Mitsuishi, Hiroshi Saito, Kenji Takechi, Hisashi Kajiwara, Hiromasa Yamagata, Koichi Hashimura
  • Patent number: 5931040
    Abstract: The present invention is directed to a rough rolling mill for rolling a slab of material into a rough bar through a hot rolling process. The rolling mill reduces material temperature drop thereby preventing a decrease in productivity. The rolling mill train for producing a rough bar from a slab of material has at least two close mill couples at an outlet side thereof. Each close mill couple is composed of two rolling mills arranged in tandem close to one another to roll the material. The at least two close mill couples are arranged so that the material being rolled is not acted upon by adjacent close mill couples at the same time.
    Type: Grant
    Filed: November 19, 1997
    Date of Patent: August 3, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Tomoaki Kimura, Shigezi Kaneko
  • Patent number: 5932395
    Abstract: To prevent positional shifts of the image forming plane during the exposure process using the two-layer phase shift mask, the height position of the semiconductor wafer 14 is moved in the optical axis direction according to the mask substrate thickness of the second component mask 12b, prior to performing the exposure process which uses the stacked-layer mask 12 that comprises a first component mask 12a formed with a pattern of light-shielding areas and light-transmitting areas and a second component mask 12b formed with a phase shift pattern to produce a phase shift in the transmitted light.
    Type: Grant
    Filed: June 5, 1998
    Date of Patent: August 3, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Yoshihiko Okamoto, Tsuneo Terasawa, Akira Imai, Norio Hasegawa, Shinji Okazaki
  • Patent number: 5933473
    Abstract: A non-destructive inspection apparatus has a radiation source, a radiation detector, a radiation source diver, a detector driver, a drive controller, a delay circuit, a radiation signal processing circuit, a memory, a computer, a display device, and an input device. The radiation detector consists of one-dimensional or two-dimensional array of detectors having a long collimator whose pores are in parallel with the radiation angle of the radiation emitted in an angular pattern from the radiation source, whereby a transmission image of a large size structure can be obtained at high speed and with a high resolution. Furthermore, the detect position in an inspection object can be specified by analyzing a plurality of specified transmission images using the inspection apparatus.
    Type: Grant
    Filed: April 2, 1997
    Date of Patent: August 3, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Hiroshi Kitaguchi, Shigeru Izumi, Hiroshi Miyai, Katsutoshi Sato, Yasuko Aoki, Yukiya Hattori
  • Patent number: 5933407
    Abstract: An optical disk apparatus comprises an optical pickup for directing a light beam onto pits formed in an optical disk and for receiving reflected light from the optical disk, an optical pickup supporting member including two guide rods for guiding the optical pickup in a radial direction of the optical disk, two first mounting members for mounting ends of one guide rod, and two second mounting members for mounting ends of the other guide rod, a chassis for mounting the first and second mounting members, an optical pickup driving mechanism including gears and a motor to move the optical pickup in a radial direction of the optical disk, a turntable on which the optical disk is located, and an optical disk drive motor for rotating the turntable.
    Type: Grant
    Filed: December 23, 1996
    Date of Patent: August 3, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Masayoshi Watanabe, Hiroshi Ogasawara, Shozo Saegusa, Toshio Sugiyama
  • Patent number: 5933724
    Abstract: A phase shifting mask is used for manufacturing a semiconductor integrated circuit device including a conductor pattern in which the line width of patterned conductor strips or the space between patterned conductor strips is not constant. For main transparent areas in the mask corresponding to the conductor pattern, auxiliary pattern segments are provided for compensating changes in the phase distribution of transmitted light caused by changes of the line width or the space. Alternately, the spaces between the conductor strips are adjusted to suppress the changes in the phase distribution of transmitted light. Whether the auxiliary pattern segments should have the phase shifting function is determined depending upon the disposition of the main transparent areas.
    Type: Grant
    Filed: August 26, 1996
    Date of Patent: August 3, 1999
    Assignees: Hitachi, Ltd., Texas Instruments
    Inventors: Toshihiro Sekiguchi, Yoshitaka Tadaki, Keizo Kawakita, Jun Murata, Katsuo Yuhara, Toshikazu Kumai, Michio Tanaka, Michio Nishimura, Kazuhiko Saitoh, Takatoshi Kakizaki, Takeshi Sakai, Toshiyuki Kaeriyama, Songsu Cho
  • Patent number: 5932859
    Abstract: An electronic-money collecting system is capable of returning a lost IC card used as an `electronic purse` to the owner of the lost IC card or an institution issuing the lost IC card with a high degree of efficiency without imposing a burden on the lost-IC-card finder or the institution issuing the IC card. When a lost IC card in which money data representing the amount of electronic money stored on the card is found, the found IC card is inserted into a terminal installed at places, such as a banking organization or a public institution. At that time, information read out from the IC card is transmitted to a center by way of a communication line. At the center, a storage unit is searched for information on the legitimate owner of the IC card, such as information for contacting the owner. The owner of the lost IC card is then notified of the implementation of processing to collect the IC card by telephone, through the post or through an electronic mail using a communication means.
    Type: Grant
    Filed: May 19, 1997
    Date of Patent: August 3, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Makoto Ijichi, Shigeyuki Itoh, Masaaki Hiroya, Hiroshi Asao, Naomi Sato, Kei Yonezawa
  • Patent number: 5931946
    Abstract: A network system includes: a plurality of repeating installations connected to the network; a plurality of computers connected to the network, each of the computers being connected to the network through a corresponding repeating installation; and a management unit connected to the network. The management unit includes distribution means for distributing at least one of an external audit program and an internal audit program for defining the processing procedure, by which the repeating installation audits vulnerability of at least one of the plurality of computers, from the management unit to the repeating installations through the network.
    Type: Grant
    Filed: February 6, 1997
    Date of Patent: August 3, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Masato Terada, Kenichi Yoshida, Makoto Kayashima
  • Patent number: 5933478
    Abstract: In the handheld terminal device, when a message reception unit receives from a host computer a new arrival message indicating a new arrival of a file (or electronic mail), a control unit analyzes the new arrival message to obtain identifier information for identifying the file (or electronic mail) and a telephone number of the host computer. After a line connection to the host computer is established by a handheld phone transceiver unit, a fetch request command for fetching the file (or electronic mail) is transmitted to automatically fetch the file (or electronic mail) from the host computer and make the user know the contents of the file (or electronic mail) by using a display unit. A FAX transmitting user designates a destination handheld terminal device and transmits FAX image data to a communication server (CS). CS stores the received FAX image data and transmits a FAX arrival message to a pager connected to the destination handheld terminal device.
    Type: Grant
    Filed: September 27, 1995
    Date of Patent: August 3, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Tomochika Ozaki, Yoshihiko Kunimori, Kouichi Hibi, Michihiro Mese, Hiroshi Shimizu, Tooru Yokozawa, Tadashi Kuwabara, Muneaki Yamaguchi
  • Patent number: 5932958
    Abstract: A main lens portion in a three beam in-line type color cathode ray tube includes spaced-apart tube-like electrodes having elongated openings at facing ends thereof, and plate electrodes disposed therein. At least one of electron beam apertures in the two plate electrodes is a barrel-like aperture. The barrel-like aperture is defined by two arcs extending in the direction perpendicular to the inline direction and two straight lines extending in the inline direction. The apertures for the side electron beams in the plate electrode can be replaced with cutouts therein. Each of the cutouts is defined by two straight lines extending in the inline direction and an arc convexly curved toward the tube axis and extending in the direction perpendicular to the inline direction.
    Type: Grant
    Filed: January 2, 1997
    Date of Patent: August 3, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Kenichi Watanabe, Shoji Shirai
  • Patent number: 5933280
    Abstract: An image display device which is compact on the whole and low in cost, and which uses a plurality of projection lens systems each of which is constituted by five lens groups including a first aspherical lens group, a second aspherical lens group, a third biconvex lens group, a fourth aspherical lens group and a fifth aspherical lens group which are arranged in this order successively from a screen side, the third lens group having refractive power of not lower than 70% of the total power of the projection lens system, the respective peripheral shapes of the first and second aspherical lens groups being set to have a predetermined relation, a low-dispersion high-index glass material being used for a convex lens of a green projection lens system, a high-dispersion high-index glass material being used for convex lenses of blue and red projection lens systems.
    Type: Grant
    Filed: April 10, 1997
    Date of Patent: August 3, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Atsuo Osawa, Hiroki Yoshikawa, Shigeru Mori, Naoyuki Ogura
  • Patent number: 5933613
    Abstract: In a computer system having a double PCI bus configuration, an inter-bus control circuit for relaying a first PCI bus and a second PCI bus is provided with a memory control mechanism common to devices connected to the second PCI bus and an interrupt control mechanism for controlling interrupts between local processors, in addition to a control function for controlling the buses. The inter-bus control circuit having the above mechanisms can be implemented by a single-chip integrated circuit. The integrated inter-bus control circuit prevents the use of a plurality of identical decoder circuits, an increase in the number of parts, and an increase in mounting area, thus providing a compact and low price computer system.
    Type: Grant
    Filed: July 3, 1996
    Date of Patent: August 3, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Toshio Tanaka, Kazuhisa Ishida, Tetsuro Kiyomatsu, Shigeo Tsujioka
  • Patent number: 5931895
    Abstract: A floating-point arithmetic processing apparatus has a circuit for generating a limit value for normalization shift by subtracting an exponent of the minimum value of a normalized number from a value of an exponent of an intermediate result, and a circuit for generating, as a normalization shift number, smaller one of a shift number necessary for making the mantissa of the intermediate result a normalized number and the limit value for normalization shift. The floating-point arithmetic processing apparatus further has a circuit having a circuit for detecting a condition for overflow before the rounding process and a circuit for generating a value in the case of overflow, so that a predetermined value is delivered as a final result only when the overflow condition is detected before the rounding process but in the other case, a result obtained by performing the normalization process and the rounding process is delivered.
    Type: Grant
    Filed: January 29, 1997
    Date of Patent: August 3, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Hiromichi Yamada, Fumio Murabayashi, Tatsumi Yamauchi, Noriyasu Ido, Yoshikazu Kiyoshige, Takahiro Nishiyama, Eiki Kamada
  • Patent number: 5932909
    Abstract: A method of manufacturing a nonvolatile semiconductor memory device which is protected against deterioration in the electron injection/discharge characteristics between a floating gate of a memory cell and a channel. Three layers including a gate oxide film, a first polysilicon layer and a first nitride film are sequentially deposited on a silicon substrate surface and patterned with stripe-like columnwise lines. A second nitride film is formed on side walls of the columnwise lines, respectively. An element isolating insulation film is formed on the silicon substrate surface which is not covered with the first and second nitride films. After removal of the first and second nitride films, a first insulation film is formed on the side walls of the first polysilicon layer.
    Type: Grant
    Filed: May 5, 1997
    Date of Patent: August 3, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Masataka Kato, Tetsuo Adachi, Hitoshi Kume, Shoji Shukuri
  • Patent number: 5933623
    Abstract: A synchronous data transfer system includes an oscillation circuit and a plurality of nodes connected to the oscillation circuit. Each node includes at least an internal logic circuit. Each of the nodes outputs a phase reference signal indicating phase of the clock signal, data processed by the internal logic circuit in response to the phase reference signal, and a transfer end signal indicating an end of transferring the data, respectively, in synchronism with the clock signal. A phase reference signal bus is connected to each node. A data bus is connected to each node for transmitting the data and a transfer end signal bus is connected to each node for transmitting the transfer end signal. A sender node includes a sending unit for sending data to a receiver node with a delay after the phase reference signal transmitted to the phase reference signal bus by the sender node, and sending simultaneously the transfer end signal to the receiver node.
    Type: Grant
    Filed: October 25, 1996
    Date of Patent: August 3, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Masaya Umemura, Toshitsugu Takekuma
  • Patent number: 5933605
    Abstract: A network system includes at least one computer which includes a processor for processing data and attaching an associated contents code corresponding to the processed data and data group information indicative of a data group corresponding to the attributes of the processed data to ask a data transmission request and a transmission controller connected to the processor for controllably transmitting a frame including the transmission sub-network, the contents code and the processed data to the first sub-network according to the data group information of the processed data. A second computer connected judges whether or not the contents code of the frame received from the first sub-network conforms to one of a plurality of data reception enable/disable judgement conditions.
    Type: Grant
    Filed: November 8, 1996
    Date of Patent: August 3, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Shigeki Kawano, Katsumi Kawano, Hiroshi Wataya, Tamio Iizuka
  • Patent number: D412500
    Type: Grant
    Filed: August 27, 1998
    Date of Patent: August 3, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Atsutoshi Sato, Koji Suso, Hiroaki Ono