Abstract: Disclosed is a resin-molded type semiconductor device having a thin package while avoiding short-circuit of wires with a common inner lead. In the construction thereof, a common inner lead constituted by a thin metal sheet is fixed onto a circuit-forming surface of a rectangular semiconductor chip substantially in parallel with longer sides of the chip and substantially in a central region of the chip, and a plurality of inner leads for signals, which are in the form of a frame, are stacked and fixed onto the common inner lead; then these components are molded with resin.

Abstract: Disclosed is a novel semiconductor integrated circuit device for use in a color VTR (Video Tape Recorder). Concretely, the semiconductor integrated circuit device comprises a substantially rectangular semiconductor chip which has a principal surface, a luminance signal processing unit and a color signal processing unit which are disposed at the positions of the principal surface opposing to each other, and a semiconductor region which is provided in the interspace of the principal surface between the luminance signal and color signal processing units opposing to each other and which is supplied with a bias stable A.C.-wise. Further, the semiconductor region is located substantially at the central portion of the semiconductor chip and is extended so as to intersect with one set of opposing sides of the rectangular semiconductor chip.

Abstract: A cache memory contained in a processor features a high efficiency in spite of its small capacity.In the cache memory control circuit, it is detected whether the access operation of the processor is directed to a particular region of the memory, and when the data is to be read out from, or is to be written onto, the particular region, the data is copied onto the cache memory and when the data is to be read out from other regions, operation of the memory is executed immediately without waiting for the reference of cache memory.By assigning the particular region for the data that is to be used repeatedly, it is possible to provide a cache memory having good efficiency in spite of its small capacity. A representative example of such data is the data in a stack.

Abstract: In a semiconductor integrated circuit device, such as a ROM having an instruction program set therein, in which an order for selecting word lines is variously different depending upon written information; a method of manufacture which can shorten a production process after the determination of the instruction program or the circuit arrangement of a decoder without adding to a manufacturing step is disclosed.

Abstract: A semiconductor memory includes a word line driving circuit whose output terminal is coupled to one end of each word line of a memory array, and also an auxiliary driving circuit which drives the other end of the word line upon receiving a selection signal transmitted to the other end of this word line. The auxiliary driving circuit comprises a level detector circuit which is dynamically driven by a timing signal, and a driving element which is driven by an output of the level detector circuit to drive the other end of the word line. When the word line is to be reset, the output of the level detector circuit is set at a level which brings the driving element into an "off" state. The auxiliary driving circuit of this arrangement permits the other end of the word line to change to a selection level quickly and to be reset quickly.