Abstract: A storage card includes non-volatile memory; an authentication engine capable to authenticate a password and transmit authorization to read from and write to files; a file system, coupled to the authentication engine, capable to receive file commands from a computer, receive authorization from the authentication engine, and to transmit file instructions; and a sector driver, coupled to the file system and the memory, capable to read from and write to the memory in response to the instructions received from the file system.

Abstract: The processor has a set of registers with each register having a dirty bit. The processor executes a method comprising: determining if a register used by a first function has a set dirty bit; and if the dirty bit is set: pushing data from the register to a stack; clearing the dirty bit; storing a bitmask in the stack indicating the register from which data was pushed; and restoring data to the register from the stack after execution of a second function that used the register.

Abstract: A storage card includes non-volatile memory; an authentication engine capable to authenticate a password and transmit authorization to read from and write to files; a file system, coupled to the authentication engine, capable to receive file commands from a computer, receive authorization from the authentication engine, and to transmit file instructions; and a sector driver, coupled to the file system and the memory, capable to read from and write to the memory in response to the instructions received from the file system.

Abstract: Antenna diodes reduction. The number of antenna diodes is reduced in order to achieve an improved integrated circuit (IC) performance in terms of speed and power consumption. Essentially, before the number of antenna diodes can be reduced interconnect segments at a metal layer and metal layers below it are checked to find out if there are any segments of interconnects to gate inputs that are not yet connected to an output of a signal source. Further, a ratio is established for each segment of interconnect to gate input(s) that is not yet connected to an output. The ratio relates to the physical characteristics of the gate and interconnect and is expressed as the relationship between the gate area and area of the interconnect segments that are not yet connected to the signal source. The ratio is then compared against a set criteria such as an upper limit of the ratio.

Abstract: A computer is coupled via a bus to a peripheral device. The peripheral device includes an I/O device portion placed on a single microchip coupled to a process device portion. The I/O device portion includes a physical layer in communication with the computer, and a data channel processor in communication with peripheral device. A single oscillator controls the speed of both of these components, and each component includes a dedicated frequency divider. The process device portion may be hardware, software or hardware and software, and may be implemented on a single chip or on multiple chips. To reduce pin count, interface controllers may be used to communicate between the I/O device portion and the process device portion across a single channel.