Patents Assigned to Hitachi Semiconductor Ltd.
  • Lead connections means for stacked tab packaged IC chips
    Patent number: 5138438
    Abstract: In the present invention, memory chips are stuck together in stacked fashion by TAB (tape automated bonding), and a multiple memory chip and lead complex like an SOP (small out-line package) is formed of the chips and leads, whereby a memory module of high packaging density can be realized by a flat packaging technique.
    Type: Grant
    Filed: November 25, 1991
    Date of Patent: August 11, 1992
    Assignees: Akita Electronics Co. Ltd., Hitachi Ltd., Hitachi Semiconductor Ltd.
    Inventors: Watanabe Masayuki, Sugano Toshio, Tsukui Seiichiro, Ono Takashi, Wakashima Yoshiaki