Patents Assigned to Hitachi Yonezawa Electronics Co., Ltd.
  • Publication number: 20140106509
    Abstract: The semiconductor device includes a tab including a chip supporting surface, and a back surface opposite to the chip supporting surface; a plurality of suspension leads supporting the tab; a plurality of leads arranged between the suspension leads; a semiconductor chip mounted on the chip supporting surface of the tab, the semiconductor chip including a main surface, a plurality of pads formed on the main surface, and a rear surface opposite to the main surface; a seal portion sealing the semiconductor chip such that a part of each of the leads is exposed from the seal portion; and a Pb-free solder formed on the part of each of the leads. A part of the rear surface of the semiconductor chip is contacted with the seal portion.
    Type: Application
    Filed: December 17, 2013
    Publication date: April 17, 2014
    Applicants: HITACHI YONEZAWA ELECTRONICS CO., LTD., RENESAS ELECTRONICS CORPORATION
    Inventor: Yoshihiko Shimanuki
  • Patent number: 8637965
    Abstract: The semiconductor device includes a tab including a chip supporting surface, and a back surface opposite to the chip supporting surface; a plurality of suspension leads supporting the tab; a plurality of leads arranged between the suspension leads; a semiconductor chip mounted on the chip supporting surface of the tab, the semiconductor chip including a main surface, a plurality of pads formed on the main surface, and a rear surface opposite to the main surface; a seal portion sealing the semiconductor chip such that a part of each of the leads is exposed from the seal portion; and a Pb-free solder formed on the part of each of the leads. A part of the rear surface of the semiconductor chip is contacted with the seal portion.
    Type: Grant
    Filed: January 24, 2012
    Date of Patent: January 28, 2014
    Assignees: Renesas Electronics Corporation, Hitachi Yonezawa Electronics Co., Ltd
    Inventor: Yoshihiko Shimanuki
  • Publication number: 20120146228
    Abstract: The semiconductor device includes a tab including a chip supporting surface, and a back surface opposite to the chip supporting surface; a plurality of suspension leads supporting the tab; a plurality of leads arranged between the suspension leads; a semiconductor chip mounted on the chip supporting surface of the tab, the semiconductor chip including a main surface, a plurality of pads formed on the main surface, and a rear surface opposite to the main surface; a seal portion sealing the semiconductor chip such that a part of each of the leads is exposed from the seal portion; and a Pb-free solder formed on the part of each of the leads. A part of the rear surface of the semiconductor chip is contacted with the seal portion.
    Type: Application
    Filed: January 24, 2012
    Publication date: June 14, 2012
    Applicants: HITACHI YONEZAWA ELECTRONICS CO., LTD., RENESAS ELECTRONICS CORPORATION
    Inventor: Yoshihiko Shimanuki
  • Patent number: 8115298
    Abstract: A semiconductor device is disclosed which includes a tab (5) for use in supporting a semiconductor chip (8), a seal section (12) as formed by sealing the semiconductor chip (8) with a resin material, more than one tab suspension lead (4) for support of the tab (5), a plurality of electrical leads (2) which have a to-be-connected portion as exposed to outer periphery on the back surface of the seal section (12) and a thickness reduced portion as formed to be thinner than said to-be-connected portion and which are provided with an inner groove (2e) and outer groove (2f) in a wire bonding surface (2d) as disposed within the seal section (12) of said to-be-connected portion, and wires (10) for electrical connection between the leads (2) and pads (7) of the semiconductor chip (8), wherein said thickness reduced portion of the leads (2) is covered by or coated with a sealing resin material while causing the wires (10) to be contacted with said to-be-connected portion at specified part lying midway between the outer
    Type: Grant
    Filed: October 4, 2010
    Date of Patent: February 14, 2012
    Assignees: Renesas Electronics Corporation, Hitachi Yonezawa Electronics Co., Ltd.
    Inventor: Yoshihiko Shimanuki
  • Patent number: 8070992
    Abstract: A cleaning sheet (29) is formed with a trough-hole (29a) at a portion corresponding to a cavity of a mold along with a slit (29b) or a flow cavity cut (29c) at every corner at an outer periphery of the through-hole (29a) and is placed between a first mold half and a second mold half of the mold to clean the inside of the mold, thereby improving the cleaning effect of the mold.
    Type: Grant
    Filed: October 18, 2010
    Date of Patent: December 6, 2011
    Assignees: Renesas Electronics Corporation, Hitachi Yonezawa Electronics Co., Ltd.
    Inventor: Kiyoshi Tsuchida
  • Patent number: 7943432
    Abstract: A cleaning sheet with frame for cleaning a molding die comprising a cleaning heat main body that covers the entire mating surface of a molding die and a reinforcing frame which can be disposed along the peripheral edge to the outside of the plural cavities of the mating surface of the molding die, the cleaning sheet main body being formed with first through holes at positions corresponding to the cavities of the molding die, air vent slits and flow cavity recesses at positions corresponding to the air vents of the cavities, second through holes at positions corresponding to the pots of the molding die, and slits at positions corresponding to the runners of the molding die, thereby capable of improving the cleaning effect of the molding die and shortening the time for the cleaning operation to improve the productivity.
    Type: Grant
    Filed: April 15, 2009
    Date of Patent: May 17, 2011
    Assignees: Renesas Electronics Corporation, Hitachi Yonezawa Electronics Co., Ltd.
    Inventor: Kiyoshi Tsuchida
  • Publication number: 20110033984
    Abstract: A cleaning sheet (29) is formed with a trough-hole (29a) at a portion corresponding to a cavity of a mold along with a slit (29b) or a flow cavity cut (29c) at every corner at an outer periphery of the through-hole (29a) and is placed between a first mold half and a second mold half of the mold to clean the inside of the mold, thereby improving the cleaning effect of the mold.
    Type: Application
    Filed: October 18, 2010
    Publication date: February 10, 2011
    Applicants: RENESAS ELECTRONICS CORPORATION, HITACHI YONEZAWA ELECTRONICS CO., LTD.
    Inventor: Kiyoshi Tsuchida
  • Publication number: 20110018122
    Abstract: A semiconductor device is disclosed which includes a tab (5) for use in supporting a semiconductor chip (8), a seal section (12) as formed by sealing the semiconductor chip (8) with a resin material, more than one tab suspension lead (4) for support of the tab (5), a plurality of electrical leads (2) which have a to-be-connected portion as exposed to outer periphery on the back surface of the seal section (12) and a thickness reduced portion as formed to be thinner than said to-be-connected portion and which are provided with an inner groove (2e) and outer groove (2f) in a wire bonding surface (2d) as disposed within the seal section (12) of said to-be-connected portion, and wires (10) for electrical connection between the leads (2) and pads (7) of the semiconductor chip (8), wherein said thickness reduced portion of the leads (2) is covered by or coated with a sealing resin material while causing the wires (10) to be contacted with said to-be-connected portion at specified part lying midway between the outer
    Type: Application
    Filed: October 4, 2010
    Publication date: January 27, 2011
    Applicants: RENESAS ELECTRONICS CORPORATION, HITACHI YONEZAWA ELECTRONICS CO., LTD.
    Inventor: Yoshihiko Shimanuki
  • Patent number: 7837908
    Abstract: A cleaning sheet (29) is formed with a trough-hole (29a) at a portion corresponding to a cavity of a mold along with a slit (29b) or a flow cavity cut (29c) at every corner at an outer periphery of the through-hole (29a) and is placed between a first mold half and a second mold half of the mold to clean the inside of the mold, thereby improving the cleaning effect of the mold.
    Type: Grant
    Filed: June 30, 2009
    Date of Patent: November 23, 2010
    Assignees: Renesas Electronics Corporation, Hitachi Yonezawa Electronics Co., Ltd.
    Inventor: Kiyoshi Tsuchida
  • Patent number: 7821119
    Abstract: A semiconductor device is disclosed which includes a tab (5) for use in supporting a semiconductor chip (8), a seal section (12) as formed by sealing the semiconductor chip (8) with a resin material, more than one tab suspension lead (4) for support of the tab (5), a plurality of electrical leads (2) which have a to-be-connected portion as exposed to outer periphery on the back surface of the seal section (12) and a thickness reduced portion as formed to be thinner than said to-be-connected portion and which are provided with an inner groove (2e) and outer groove (2f) in a wire bonding surface (2d) as disposed within the seal section (12) of said to-be-connected portion, and wires (10) for electrical connection between the leads (2) and pads (7) of the semiconductor chip (8), wherein said thickness reduced portion of the leads (2) is covered by or coated with a sealing resin material while causing the wires (10) to be contacted with said to-be-connected portion at specified part lying midway between the outer
    Type: Grant
    Filed: November 2, 2009
    Date of Patent: October 26, 2010
    Assignees: Renesas Electronics Corporation, Hitachi Yonezawa Electronics Co., Ltd.
    Inventor: Yoshihiko Shimanuki
  • Patent number: 7804159
    Abstract: A semiconductor device is disclosed which includes a tab (5) for use in supporting a semiconductor chip (8), a seal section (12) as formed by sealing the semiconductor chip (8) with a resin material, more than one tab suspension lead (4) for support of the tab (5), a plurality of electrical leads (2) which have a to-be-connected portion as exposed to outer periphery on the back surface of the seal section (12) and a thickness reduced portion as formed to be thinner than said to-be-connected portion and which are provided with an inner groove (2e) and outer groove (2f) in a wire bonding surface (2d) as disposed within the seal section (12) of said to-be-connected portion, and wires (10) for electrical connection between the leads (2) and pads (7) of the semiconductor chip (8), wherein said thickness reduced portion of the leads (2) is covered by or coated with a sealing resin material while causing the wires (10) to be contacted with said to-be-connected portion at specified part lying midway between the outer
    Type: Grant
    Filed: June 30, 2004
    Date of Patent: September 28, 2010
    Assignees: Renesas Electronics Corporation, Hitachi Yonezawa Electronics Co., Ltd.
    Inventor: Yoshihiko Shimanuki
  • Patent number: 7777312
    Abstract: A semiconductor device is disclosed which includes a tab (5) for use in supporting a semiconductor chip (8), a seal section (12) as formed by sealing the semiconductor chip (8) with a resin material, more than one tab suspension lead (4) for support of the tab (5), a plurality of electrical leads (2) which have a to-be-connected portion as exposed to outer periphery on the back surface of the seal section (12) and a thickness reduced portion as formed to be thinner than said to-be-connected portion and which are provided with an inner groove (2e) and outer groove (2f) in a wire bonding surface (2d) as disposed within the seal section (12) of said to-be-connected portion, and wires (10) for electrical connection between the leads (2) and pads (7) of the semiconductor chip (8), wherein said thickness reduced portion of the leads (2) is covered by or coated with a sealing resin material while causing the wires (10) to be contacted with said to-be-connected portion at specified part lying midway between the outer
    Type: Grant
    Filed: August 1, 2008
    Date of Patent: August 17, 2010
    Assignees: Renesas Technology Corp., Hitachi Yonezawa Electronics Co., Ltd.
    Inventor: Yoshihiko Shimanuki
  • Publication number: 20100044854
    Abstract: A semiconductor device is disclosed which includes a tab (5) for use in supporting a semiconductor chip (8), a seal section (12) as formed by sealing the semiconductor chip (8) with a resin material, more than one tab suspension lead (4) for support of the tab (5), a plurality of electrical leads (2) which have a to-be-connected portion as exposed to outer periphery on the back surface of the seal section (12) and a thickness reduced portion as formed to be thinner than said to-be-connected portion and which are provided with an inner groove (2e) and outer groove (2f) in a wire bonding surface (2d) as disposed within the seal section (12) of said to-be-connected portion, and wires (10) for electrical connection between the leads (2) and pads (7) of the semiconductor chip (8), wherein said thickness reduced portion of the leads (2) is covered by or coated with a sealing resin material while causing the wires (10) to be contacted with said to-be-connected portion at specified part lying midway between the outer
    Type: Application
    Filed: November 2, 2009
    Publication date: February 25, 2010
    Applicants: RENESAS TECHNOLOGY CORP., HITACHI YONEZAWA ELECTRONICS CO., LTD.
    Inventor: Yoshihiko Shimanuki
  • Publication number: 20090263940
    Abstract: A cleaning sheet (29) is formed with a trough-hole (29a) at a portion corresponding to a cavity of a mold along with a slit (29b) or a flow cavity cut (29c) at every corner at an outer periphery of the through-hole (29a) and is placed between a first mold half and a second mold half of the mold to clean the inside of the mold, thereby improving the cleaning effect of the mold.
    Type: Application
    Filed: June 30, 2009
    Publication date: October 22, 2009
    Applicants: RENESAS TECHNOLOGY CORP., HITACHI YONEZAWA ELECTRONICS CO., LTD.
    Inventor: Kiyoshi Tsuchida
  • Publication number: 20090203173
    Abstract: A cleaning sheet with frame for cleaning a molding die comprising a cleaning heat main body that covers the entire mating surface of a molding die and a reinforcing frame which can be disposed along the peripheral edge to the outside of the plural cavities of the mating surface of the molding die, the cleaning sheet main body being formed with first through holes at positions corresponding to the cavities of the molding die, air vent slits and flow cavity recesses at positions corresponding to the air vents of the cavities, second through holes at positions corresponding to the pots of the molding die, and slits at positions corresponding to the runners of the molding die, thereby capable of improving the cleaning effect of the molding die and shortening the time for the cleaning operation to improve the productivity.
    Type: Application
    Filed: April 15, 2009
    Publication date: August 13, 2009
    Applicants: RENESAS TECHNOLOGY CORP, HITACHI YONEZAWA ELECTRONICS CO., LTD.
    Inventor: Kiyoshi Tsuchida
  • Patent number: 7572398
    Abstract: A cleaning sheet (29) is formed with a trough-hole (29a) at a portion corresponding to a cavity of a mold along with a slit (29b) or a flow cavity cut (29c) at every corner at an outer periphery of the through-hole (29a) and is placed between a first mold half and a second mold half of the mold to clean the inside of the mold, thereby improving the cleaning effect of the mold.
    Type: Grant
    Filed: May 11, 2006
    Date of Patent: August 11, 2009
    Assignees: Renesas Technology Corp., Hitachi Yonezawa Electronics Co., Ltd.
    Inventor: Kiyoshi Tsuchida
  • Patent number: 7537967
    Abstract: A cleaning sheet with frame for cleaning a molding die comprising a cleaning heat main body that covers the entire mating surface of a molding die and a reinforcing frame which can be disposed along the peripheral edge to the outside of the plural cavities of the mating surface of the molding die, the cleaning sheet main body being formed with first through holes at positions corresponding to the cavities of the molding die, air vent slits and flow cavity recesses at positions corresponding to the air vents of the cavities, second through holes at positions corresponding to the pots of the molding die, and slits at positions corresponding to the runners of the molding die, thereby capable of improving the cleaning effect of the molding die and shortening the time for the cleaning operation to improve the productivity.
    Type: Grant
    Filed: September 6, 2005
    Date of Patent: May 26, 2009
    Assignees: Renesas Technology Corp., Hitachi Yonezawa Electronics Co. Ltd.
    Inventor: Kiyoshi Tsuchida
  • Patent number: 7407834
    Abstract: A non-leaded resin-sealed semiconductor device is manufactured by the steps of providing a metal substrate having a front surface, a rear surface, a chip fixing partition part, partition parts arranged around the chip fixing partition part, and grooves defined between the partition parts; providing a semiconductor chip having a front surface, a rear surface, electrodes formed on the front surface; fixing the semiconductor chip on the chip fixing partition part of the front surface of the metal substrate; electrically connecting the electrodes of the semiconductor chip with the front surface of the partition parts of the metal substrate by conductive wires, respectively; and forming a resin body which seals the semiconductor chip, the conductive wires, and the front surface of the partition parts of the metal substrate.
    Type: Grant
    Filed: August 2, 2004
    Date of Patent: August 5, 2008
    Assignees: Renesas Technology Corp., Hitachi Yonezawa Electronics Co., Ltd.
    Inventors: Yoshihiko Shimanuki, Masayuki Suzuki
  • Patent number: 7384582
    Abstract: A cleaning sheet (29) is formed with a trough-hole (29a) at a portion corresponding to a cavity of a mold along with a slit (29b) or a flow cavity cut (29c) at every corner at an outer periphery of the through-hole (29a) and is placed between a first mold half and a second mold half of the mold to clean the inside of the mold, thereby improving the cleaning effect of the mold.
    Type: Grant
    Filed: June 28, 2001
    Date of Patent: June 10, 2008
    Assignees: Renesas Technology Corp., Hitachi Yonezawa Electronics Co., Ltd.
    Inventor: Kiyoshi Tsuchida
  • Patent number: 7015069
    Abstract: The back side of a strip substrate with plural semiconductor chips mounted thereon is vacuum-chucked to a lower mold half of a mold, and in this state the plural semiconductor chips are sealed with resin simultaneously to form a seal member. Thereafter, the strip substrate and the seal member are released from the mold and are cut into plural semiconductor devices. The semiconductor devices thus obtained are improved in their mounting reliability.
    Type: Grant
    Filed: February 2, 2005
    Date of Patent: March 21, 2006
    Assignees: Renesas Technology Corp., Hitachi ULSI Systems Co., Ltd., Hitachi Yonezawa Electronics Co., Ltd.
    Inventors: Noriyuki Takahashi, Masayuki Suzuki, Kouji Tsuchiya, Takao Matsuura, Takanori Hashizume, Masahiro Ichitani, Kazunari Suzuki, Takafumi Nishita, Kenichi Imura, Takashi Miwa