Patents Assigned to Honeywell Advanced Circuits, Inc.
  • Patent number: 6727711
    Abstract: Methods and devices for testing connectivity between connectors on a circuit board include utilizing a bias board having a photoconductive layer coated with a light-transmissive electrically conductive layer in conjunction with a light source and a voltage source to alternately charge and discharge conductors. A conductor discharged by connecting it to a ground via the bias board is determined to be electrically connected to a previously charged conductor if current flows between the conductor and the ground.
    Type: Grant
    Filed: June 25, 2002
    Date of Patent: April 27, 2004
    Assignee: Honeywell Advanced Circuits, Inc.
    Inventor: Yutaka Doi
  • Patent number: 6590398
    Abstract: Methods and devices for testing connectivity between connectors on a circuit board include utilizing a bias board having a photoconductive layer coated with a light-transmissive electrically conductive layer in conjunction with a light source and a voltage source to alternately charge and discharge conductors. A conductor discharged by connecting it to a ground via the bias board is determined to be electrically connected to a previously charged conductor if current flows between the conductor and the ground.
    Type: Grant
    Filed: July 6, 2000
    Date of Patent: July 8, 2003
    Assignee: Honeywell Advanced Circuits, Inc.
    Inventor: Yutaka Doi
  • Patent number: 6559656
    Abstract: Measurement of the permittivity of thin films is facilitated through the use of a short cylindrical metal cavity containing parallel plates between which a specimen to be measured is placed. The use of such parallel plates contained within such a cavity is particularly advantageous when swept frequency measurement methods utilizing frequency ranges from 0 to 20 GHz are employed. A test fixture which is preferred for use in providing such a cavity is disclosed as are methods of using the test fixture.
    Type: Grant
    Filed: December 28, 2000
    Date of Patent: May 6, 2003
    Assignee: Honeywell Advanced Circuits, Inc.
    Inventor: Yutaka Doi
  • Publication number: 20030077529
    Abstract: A method for verifying an imaged article prior to etching comprising: providing the imaged article to be verified, the imaged article comprising an exposed photo resist layer; prior to etching the imaged article, examining the exposed photo resist layer; and making a determination based at least in part on the examination of the photo resist layer whether the imaged article is to be re-imaged.
    Type: Application
    Filed: October 15, 2001
    Publication date: April 24, 2003
    Applicant: Honeywell Advanced Circuits, Inc.
    Inventor: Paul J. Berndt
  • Publication number: 20030070931
    Abstract: An improved plating method in which non-plated vias or through holes are temporarily metalized for use as busses during selective noble metal plating and subsequently de-metalized to prevent shorting together of the nobly plated features.
    Type: Application
    Filed: October 17, 2001
    Publication date: April 17, 2003
    Applicant: Honeywell Advanced Circuits, Inc.
    Inventor: Keith G. Kitchens
  • Patent number: 6539157
    Abstract: Compositions and methods are provided whereby printed wiring boards may be produced that comprise a) a substrate layer, and b) a hollow, mirror-clad optical wave-guide laminated onto the substrate layer. The printed wiring board further comprises a cover material coupled to the wave-guide.
    Type: Grant
    Filed: December 28, 2000
    Date of Patent: March 25, 2003
    Assignee: Honeywell Advanced Circuits, Inc.
    Inventor: Yutaka Doi
  • Publication number: 20030044699
    Abstract: Methods for detection of defects introduced during processing within an exposure machine without the use of develop-etch-strip (“DES”) processed production layers. In particular, utilizing a “check board” that has different processing requirement than a production layer may significantly reduce the time and/or cost required for eliminating repetitive defects. A photoimagable MYLAR® (thin, strong, and polyester) sheet such as DuPont's CRONALAR hilight contact phototooling film may be advantageously used as the check board when producing printed wiring boards via DES processing.
    Type: Application
    Filed: August 28, 2001
    Publication date: March 6, 2003
    Applicant: Honeywell Advanced Circuits, Inc.
    Inventor: Eric N. Nickles
  • Publication number: 20030041710
    Abstract: A cutting system which reduces the risk of damage to a printed wiring board during bevel formation by using a modified cutter having reduced length cutting edges joined to guide surfaces wherein the cutting edges have an actual angle of intersection which is less than the apparent angle of intersection of the guide surfaces.
    Type: Application
    Filed: September 6, 2001
    Publication date: March 6, 2003
    Applicant: Honeywell Advanced Circuits, Inc.
    Inventor: Michael D. Kokosh
  • Publication number: 20030043369
    Abstract: An automated optical inspection system having a marking system for marking areas of a board containing one or more defects with a mark or marks which are readily visible to the naked eye and which indicated the type of defect in the area being marked. Such systems may be formed from existing systems by attaching a light source to the system camera and using the light source to identify the portion of a board being inspected so that an operator can manually mark the board, or may be systems that include automated or semi-automated marking systems for marking the board.
    Type: Application
    Filed: August 28, 2001
    Publication date: March 6, 2003
    Applicant: Honeywell Advanced Circuits, Inc.
    Inventor: Ann M. Smith
  • Publication number: 20030034175
    Abstract: An electronic device has a dielectric substrate with first and second surface and a via through the substrate connecting the first and second surfaces. A first and second sacrificial copper structure surrounds the via on the first and second surfaces, respectively, wherein each of the sacrificial structures covers an area of less than three times the horizontal cross sectional area of the via. Contemplated sacrificial structures are preferably formed in a photolithographic process.
    Type: Application
    Filed: August 20, 2001
    Publication date: February 20, 2003
    Applicant: Honeywell Advanced Circuits, Inc.
    Inventors: Henry Johnson, James P. Augustine
  • Patent number: 6510392
    Abstract: Methods and apparatus for improved impedance measurements are which allow for shorter delays during recalibration and which eliminate the need to physically disconnect and reconnect test leads after initial calibration has been completed. In particular, an adjustment factor is calculated based on impedances measured during initial calibration and is used to adjust future impedance measurements. Moreover, a plurality of loads having pre-measured impedances are switchably connected to the meter such that re-calibration using said loads may be accomplished without the physical connection or disconnection of test leads. The plurality of loads are preferably incorporated into a test board which also comprises additional test leads and a switching mechanism to alternately connect the various loads and test leads to the meter.
    Type: Grant
    Filed: December 28, 2000
    Date of Patent: January 21, 2003
    Assignee: Honeywell Advanced Circuits, Inc.
    Inventors: Yutaka Doi, Stephen L. Tisdale
  • Patent number: 6454154
    Abstract: A delivery system a soldering paste to an electronics package includes a pressurized supply of via fill paste and a pressure head attached to the pressurized supply of via fill paste. The pressure head includes a main body and a wear portion. Attached to the wear portion is a gasket positioned along one surface of the pressure head. The pressure head also includes a flow dispersion regulator which includes a feed tube positioned within the main body, the feed tube has a plurality of flow regulating openings. The flow regulating openings in the feed tube are sized to maintain a substantially constant pressure at each of the flow regulating openings. Positioned between the main body and the wear portion is a flow equalization grid. The flow equalization grid includes a multiplicity of openings. Attached to the wear element is a gasket. The pressure source preferably includes a ram press.
    Type: Grant
    Filed: December 28, 2000
    Date of Patent: September 24, 2002
    Assignee: Honeywell Advanced Circuits, Inc.
    Inventor: Jesse L. Pedigo
  • Publication number: 20020083585
    Abstract: Compositions and methods are provided whereby printed wiring boards may be produced that comprise a) a substrate layer, and b) a solid, substantially planar optical wave-guide laminated onto the substrate layer. The printed wiring board farther comprises at least one of a laminating material or a cladding material coupled to the wave-guide, and at least one additional layer coupled to the laminating material or the cladding material.
    Type: Application
    Filed: October 18, 2001
    Publication date: July 4, 2002
    Applicant: Honeywell Advanced Circuits, Inc.
    Inventor: Yutaka Doi