Abstract: An admission scheme is provided for selective admission of voice data packets to a voice network from a communication network having data and voice packets. The scheme can be implemented using a device such as a network switch. According to the admission scheme, the MAC address of a device is acquired and stored upon admission of the device to the voice network. The source MAC address of data packets is checked before the packets are admitted from the communication network to the voice network. A packet is admitted to the voice network only if the MAC address is registered with the voice network.

Abstract: Subject matter disclosed herein may relate to packaging for multi-chip semiconductor devices as may be used, for example, in tire pressure monitoring systems.

Abstract: Systems and methods which introduce a variable shift with respect to pilot symbols in providing a data subcarrier channel estimation are shown. Use of pilot symbol shifts may be useful, for example, when path delay is long and/or when non-consecutive, non-uniformly distributed pilot subcarriers are used. The foregoing shift may be introduced in the time or frequency domains according to embodiments of the invention. For example, a shift of a particular number of samples may be introduced with respect to the symbols of the pilot subcarriers in the measured pilot subcarrier channel response for use in data subcarrier channel estimation.

Abstract: A light guiding strip and a backlight module and display using the same are provided. The light guiding strip of the present invention includes a plurality of light reflecting surfaces and a plurality of light emergent surfaces. Each of the light reflecting surfaces has a light diffusion pattern. The light guiding strip of the present invention has the advantages of light weight, wide LED pitch, low cost, thickness and so on.

Abstract: A semiconductor light emitting device for emission of light having a predetermined bandwidth in a primary direction of emission includes a light generating region for the generation of light; and a 1-dimensional photonic crystal structure having a photonic bandgap covering at least a segment of said bandwidth. The 1-dimensional photonic crystal structure is located such that upon incident of light from the light generating region, light having a wavelength within the bandgap of the 1-dimensional photonic crystal structure is reflected in the primary direction of emission.

Abstract: A sensing system for sensing a touch input on a touch sensitive device, the system including: a sensing plane; a well-collimated light source for generating a plurality of light rays along one or more planes different from the sensing plane; and a reflecting means adjacent one edge of the sensing plane for transforming at least a subset of the light rays into substantially parallel light rays and redirecting the subset of light rays along the sensing plane, at least one of the light rays along the sensing plane being interruptable by the touch input thereby allowing the sensing system to determine a position coordinate of the touch input. A related method of sensing a touch input on a touch sensitive device is also provided.

Abstract: A heat exchange structure includes elongated air ducts. Each air duct has a first opening and a second opening at two ends of the air duct to allow air to enter and exit the air duct, respectively. The heat exchange structure includes an exterior heat exchange surface and interior heat exchange surfaces, in which the exterior heat exchange surface is configured to receive thermal energy from heat generators that are mounted on the exterior heat exchange surface, and the exterior heat exchange surface dissipates a portion of the thermal energy received from the heat generators and transfers another portion of the thermal energy to the interior heat exchange surfaces. The interior heat exchange surfaces are in the elongated air ducts and configured to exchange thermal energy with air flowing in the air ducts, enhancing air flow in the air ducts by buoyancy of heated air.

Abstract: An Orthogonal Frequency Division Multiplexing (OFDM) receiver comprises: a channel estimator receiving a signal that includes a plurality of symbols, each of the symbols including a plurality of pilots and a plurality of data subcarriers, wherein each symbol further includes at least one pilot subcarrier, the estimator using a first channel response estimate of the at least one pilot subcarrier in a first symbol to select a first weight matrix from a plurality of pre-generated weight matrices, and generating channel estimation information for data subcarriers in the first symbol using the selected first weight matrix.

Abstract: Systems and methods for time synchronization of orthogonal frequency-division multiplexing (OFDM)-based communications are disclosed. A cyclic prefix (CP) correlation-based timing synchronization method is disclosed for early path (e.g. first-received path) detection for OFDM-based communication. Systems and methods are disclosed for performing double peak value detection in an OFDM-based system for reliably detecting an early (e.g., first-received) path in a received OFDM symbol for use in timing synchronization. In the double peak value detection method, a first peak value detection is performed to detect the path with the largest power, and a second peak value detection is then performed to detect a desired early (e.g., first-received) path. A compensation linear curve is used to facilitate the second peak value detection.

Abstract: A system for providing multiple antenna patterns comprises a first antenna element, a second antenna element, wherein the first and second antenna elements are coplanar and arranged orthogonally with respect to each other in the plane, and a feed circuit in communication with a signal feed line alternately connecting the signal feed line to each of the first and second antenna elements.

Abstract: A memory device includes memory cells each having a recordable layer between two metal layers, each memory cell being constructed and designed to change from a first state to a second state upon application of an initialization signal, and change from the second state to a third state upon application of a write signal. For a voltage within a specified range that is applied across the two metal layers, the memory cell has a lower resistance in the first state than in the second state, and has a higher resistance in the second state than in the third state.

Abstract: A hybrid Analog-to-Digital Converter (ADC) has a binary-weighted capacitor array and a sub-voltage capacitor array that are coupled together by a coupling capacitor. The sub-voltage capacitor array uses a minimum capacitor size that matches the minimum capacitor size of the binary-weighted capacitor array. The coupling capacitor is double the minimum size and reduces a voltage effect on a charge sharing line by half. Second coupling capacitors in the sub-voltage capacitor array each reduce the voltage effect by half, so that first, second, and third sub-voltage capacitors in the sub-voltage capacitor array produce ½, ¼, and ? voltage swings using the minimum size capacitance. Only MSB capacitors in the binary-weighted capacitor array sample the analog input voltage. During conversion, MSB's from a Successive-Approximation-Register (SAR) are applied to binary-weighted capacitors while LSB's are applied to sub-voltage capacitors.

Abstract: A memory cell of a memory device is fabricated by forming a first electrode on a substrate, positioning a photo mask at a first position relative to the substrate, and forming a first material layer on the first electrode based on a pattern on the photo mask. The photo mask is positioned at a second position relative to the substrate, and a second material layer is formed above the first material layer based on the pattern on the photo mask, the second material layer being offset from the first material layer so that a first sub-cell of the memory cell includes the first material layer and not the second material layer, and a second sub-cell of the memory cell includes both the first and second material layers. A second electrode is formed above the first and second material layers.

Abstract: A lighting control system for controlling the lighting of a predetermined area is provided. According to one embodiment, the lighting control system comprises one or more light sources positioned in the predetermined area, the light source configured to include adjustable light intensity; a camera positioned and configured to capture an image of the predetermined area; and a controller in operable communication with the one or more light sources and the camera, the controller configured to control the one or more light sources and adjust the light intensity of the light source. The controller is configured to operate in a closed control loop to automatically adjust the lighting conditions of a predetermined area or environment. A false alarm checking process checks for temporary or localized events to prevent unnecessary lighting adjustments.

Abstract: A quasi-vertical light emitting device is provided. According to one embodiment of the present invention, the quasi-vertical light emitting diode includes a sapphire substrate; a plurality of semiconductor layers grown on the sapphire substrate, the plurality of semiconductor layers including an n-GaN layer, an active layer, and a p-GaN layer; a plurality of holes etched in the plurality of semiconductor layers, each of the plurality of holes etched to the sapphire substrate, and a plurality of sapphire holes in the sapphire substrate, each of the plurality of holes aligned with one of the plurality of sapphire holes to form hole walls, the hole walls and bottom deposited with an n-metal and each of the plurality of holes filled with another metal to form a n-electrode contact; an n-mesa in the active layer and the p-GaN layer, the n-mesa deposited with an n-metal and a passivation layer grown over the n-metal; and a p-metal layer deposited on the p-GaN layer, and a p-electrode bonded to the p-metal.

Abstract: A host substrate and method of making a host substrate for nitride based thin-film semiconductor devices are provided. According to one embodiment, the method includes the steps of providing a silicon layer; etching a pattern of holes in the silicon layer; plating the silicon layer with copper to fill the holes etched in the silicon layer; bonding the silicon layer to a gallium nitride (GaN) layer, the GaN layer attached to a sapphire substrate; and removing the sapphire substrate. The host substrate is configured to address the coefficient of thermal expansion (CTE) mismatch problem and reduce the amount of stress resulting from such CTE mismatch. A combination of metal and semiconductor materials provide for the desired thermal and electrical conductivity while providing for subsequent dicing and incorporation of the finished semiconductor devices into other circuits.

Abstract: One aspect of the present invention provides an electronic package, comprising at least a first module and a second module arranged on top of the first module, the modules together in the form of a module stack, wherein the first and second modules are adhesively connected together, each module includes a substrate layer having at least one metal layer, at least one die and a plastic(s) package molding compound layer molded over said die or dice, in each module the die or dice are bonded on said substrate layer via the metal layer, a plurality of channels formed generally vertically acting as vias to connect the metal layers and arranged adjacent to the die or dice in at least one of the modules, some or all the channels provided with an inner surface coated with a conductive material layer or filled with a conductive material for electrical connection whereby the dice are electrically connected together, and means serving as an intermediary for providing electrical, mechanical and thermal connectivity, commu

Abstract: The subject matter disclosed herein relates to an imaging device having a small form factor.

Abstract: A method, apparatus and computer program product for correcting white balance in a digital image are described. The method comprises determining a number of grey blocks in the digital image (s102), each block comprising a subset of pixels of the image, and if the number of grey blocks is less than a predetermined value, scaling one or more color channels of the digital image using a first gain value to generate a first intermediate image (s201A) and scaling one or more color channels of the digital image using a second gain value to generate a second intermediate image (s201B). A number of grey blocks in each of the first and second intermediate images (s202A, s202B) is determined and the gain value resulting in the intermediate image having a greater number of grey blocks is set as the reference gain value (s203). A grey world process is performed on the intermediate image having a greater number of grey blocks (s205).

Abstract: A heat exchange structure includes a plurality of elongated air ducts. The heat exchange structure has an exterior heat exchange surface and interior heat exchange surfaces, the interior surfaces being in the elongated air ducts. The heat exchange structure includes a plurality of heat generators that are distributed on the exterior heat exchange surface along an elongated direction of the air ducts, in which air flowing in the air duct is heated successively by heat from the heat generators, and air flow in the air duct is enhanced by buoyancy of heated air.