Patents Assigned to HRL Laboratories, LLC
  • Patent number: 11561095
    Abstract: A resonator includes an anchor, an outer stiffener ring on an outer perimeter of the resonator, and a plurality of curved springs between the anchor and the outer stiffener ring.
    Type: Grant
    Filed: April 13, 2020
    Date of Patent: January 24, 2023
    Assignee: HRL LABORATORIES, LLC
    Inventors: Lian X. Huang, Logan Sorenson, Raviv Perahia, Hung Nguyen, David T. Chang
  • Patent number: 11562111
    Abstract: A prediction system for simulating effects of a real-world event can be used for autonomous driving. In operation, the system receives input data regarding a complex system (e.g., roadways) and various real-world events. A full-scale network is constructed of the complex system, such that nodes represent road intersections and edges between nodes represent road segments linking the road intersections. The network is reduced is scaled down to generate a multi-layer model of the complex system. Each layer in the model is simulated to identify equilibrium flows, with the model thereafter destabilized by applying stimuli to reflect the real-world event. An autonomous vehicle can then be caused to chart and traverse a road path based on road segments and intersections that are least affected by the real-world event.
    Type: Grant
    Filed: October 8, 2019
    Date of Patent: January 24, 2023
    Assignee: HRL LABORATORIES, LLC
    Inventors: Alex N. Waagen, Charles E. Martin
  • Patent number: 11562984
    Abstract: A method and apparatus for laterally urging two semiconductor chips, dies or wafers into an improved state of registration with each other, the method and apparatus employing microstructures comprising: a first microstructure disposed on a first major surface of a first one of said two semiconductor chips, dies or wafers, wherein the first microstructure includes a sidewall which is tapered thereby disposing it at an acute angle compared to a perpendicular of said first major surface, and a second microstructure disposed on a first surface of a second one of said two semiconductor chips, dies or wafers, wherein the shape of the second microstructure is complementary to, and mates with or contacts, in use, the first microstructure, the second microstructure including a surface which contacts said sidewall when the first and second microstructures are mated or being mated, the sidewall of the first microstructure and the surface of the second microstructure imparting a lateral force for urging the two semicondu
    Type: Grant
    Filed: October 14, 2020
    Date of Patent: January 24, 2023
    Assignee: HRL LABORATORIES, LLC
    Inventors: Peter Brewer, Aurelio Lopez, Partia Naghibi-Mahmoudabadi, Tahir Hussain
  • Patent number: 11563420
    Abstract: A RF antenna or sensor has a substrate, a resonator operable at UHF disposed on the substrate, the resonator preferably having a quartz bar or body with electrodes disposed on opposing major surfaces thereof and with a magnetostrictive material disposed on or covering at least one of the electrodes. A pair of trapezoidal, triangular or wing shaped high permeability pole pieces preferably supported by that substrate are disposed confronting the resonator, one of the pair being disposed one side of the resonator and the other one of the pair being disposed on an opposing side of said resonator, the pair of high permeability pole pieces being spaced apart by a gap G, the resonator being disposed within that gap G. The size of gap G is preferably less than 100 ?m.
    Type: Grant
    Filed: January 28, 2020
    Date of Patent: January 24, 2023
    Assignee: HRL LABORATORIES, LLC
    Inventors: Randall L. Kubena, Walter S. Wall
  • Patent number: 11555830
    Abstract: A temporary bond method and apparatus for allowing wafers, chips or chiplets. To be tested, the temporary bond method and apparatus comprising: a temporary connection apparatus having one of more knife-edged microstructures, wherein the temporary connection apparatus serves, in use, as a probe device for probing the chiplets, each chiplet including a die having one or more flat contact pads which mate with the one of more knife-edged microstructures of the temporary connection apparatus; a press apparatus for applying pressure between the one or more flat contact pads on the chiplet with the one of more knife-edged microstructures of the temporary connection apparatus thereby forming a temporary bond between the temporary connection pad with the knife-edged microstructure in contact with the one or more flat wafer pads; the press being able to apply a pressure to maintain the temporary bond connection during or prior to testing of the chiplet.
    Type: Grant
    Filed: August 28, 2020
    Date of Patent: January 17, 2023
    Assignee: HRL LABORATORIES, LLC
    Inventors: Erik S. Daniel, Aurelio Lopez, Peter Brewer
  • Patent number: 11551156
    Abstract: A method for computing a human-machine hybrid ensemble prediction includes: receiving an individual forecasting question (IFP); classifying the IFP into one of a plurality of canonical question topics; identifying machine models associated with the canonical question topic; for each of the machine models: receiving, from one of a plurality of human participants: a first task input including a selection of sets of training data; a second task input including selections of portions of the selected sets of training data; and a third task input including model parameters to configure the machine model; training the machine model in accordance with the first, second, and third task inputs; and computing a machine model forecast based on the trained machine model; computing an aggregated forecast from machine model forecasts computed by the machine models; and sending an alert in response to determining that the aggregated forecast satisfies a threshold condition.
    Type: Grant
    Filed: December 13, 2019
    Date of Patent: January 10, 2023
    Assignee: HRL LABORATORIES, LLC.
    Inventors: Aruna Jammalamadaka, David J. Huber, Samuel D. Johnson, Tsai-Ching Lu
  • Patent number: 11550914
    Abstract: Described is a system for detecting backdoor attacks in deep convolutional neural networks (CNNs). The system compiles specifications of a pretrained CNN into an executable model, resulting in a compiled model. A set of Universal Litmus Patterns (ULPs) are fed through the compiled model, resulting in a set of model outputs. The set of model outputs are classified and used to determine presence of a backdoor attack in the pretrained CNN. The system performs a response based on the presence of the backdoor attack.
    Type: Grant
    Filed: April 21, 2020
    Date of Patent: January 10, 2023
    Assignee: HRL LABORATORIES, LLC
    Inventors: Soheil Kolouri, Heiko Hoffmann
  • Patent number: 11550321
    Abstract: Described is a system and method for the classification of agents based on agent movement patterns. In operation, the system receives position data of a moving agent from a camera or sensor. Motion data of the moving agent is then extracted and used to generate a predicted future motion of the moving agent using a set of pre-calculated Echo State Networks (ESN). Each ESN represents an agent classification and generates a predicted future motion. A prediction error is generated for each ESN by comparing the predicted future motion for each ESN with actual motion data. Finally, the agent is classified based on the ESN having the smallest prediction error.
    Type: Grant
    Filed: August 2, 2019
    Date of Patent: January 10, 2023
    Assignee: HRL LABORATORIES, LLC
    Inventors: Terrell N. Mundhenk, Heiko Hoffmann
  • Patent number: 11542605
    Abstract: The disclosed process is capable of depositing thin layers of a wide variety of metals onto powders of magnesium, aluminum, and their alloys. A material is provided that comprises particles containing a reactive metal coated with a noble metal that has a less-negative standard reduction potential than the reactive metal. The coating has a thickness from 1 nanometer to 100 microns, for example. A method of forming an immersion deposit on a reactive metal comprises: combining a reactive metal, an ionic liquid, and a noble metal salt; depositing the noble metal on the reactive metal by a surface-displacement reaction, thereby generating the immersion deposit on the reactive metal; and removing the ionic liquid from the immersion deposit. The material may be present in an article or object (e.g., a sintered part) containing from 0.25 wt % to 100 wt % of a coated reactive metal as disclosed herein.
    Type: Grant
    Filed: April 8, 2020
    Date of Patent: January 3, 2023
    Assignee: HRL Laboratories, LLC
    Inventors: John H. Martin, Adam F. Gross
  • Patent number: 11535568
    Abstract: This invention provides resin formulations which may be used for 3D printing and pyrolyzing to produce a ceramic matrix composite. The resin formulations contain a solid-phase filler, to provide high thermal stability and mechanical strength (e.g., fracture toughness) in the final ceramic material. The invention provides direct, free-form 3D printing of a preceramic polymer loaded with a solid-phase filler, followed by converting the preceramic polymer to a 3D-printed ceramic matrix composite with potentially complex 3D shapes or in the form of large parts. Other variations provide active solid-phase functional additives as solid-phase fillers, to perform or enhance at least one chemical, physical, mechanical, or electrical function within the ceramic structure as it is being formed as well as in the final structure. Solid-phase functional additives actively improve the final ceramic structure through one or more changes actively induced by the additives during pyrolysis or other thermal treatment.
    Type: Grant
    Filed: November 26, 2017
    Date of Patent: December 27, 2022
    Assignee: HRL Laboratories, LLC
    Inventors: Zak C. Eckel, Andrew P. Nowak, Ashley M. Nelson, April R. Rodriguez
  • Patent number: 11536800
    Abstract: An integrated radar circuit comprising: a first substrate, of a first semiconductor material, said first substrate comprising an integrated transmit and receive radar circuit; a second substrate, of a second semiconductor material, said second substrate comprising at least on through-substrate cavity having cavity walls; at least one discrete transistor chip, of a third semiconductor material, said at least one discrete transistor chip having chip walls and being held in said at least one through-substrate cavity by a metal filling extending from at least one cavity wall to at least one chip wall; a conductor on said second substrate, electrically connecting a portion of said integrated transmit and receive radar circuit to a discrete transistor on said at least one discrete transistor chip.
    Type: Grant
    Filed: March 19, 2021
    Date of Patent: December 27, 2022
    Assignee: HRL LABORATORIES, LLC
    Inventors: Florian G. Herrault, Jonathan J. Lynch
  • Patent number: 11535360
    Abstract: Some variations provide a leading-edge heat pipe comprising: (a) an envelope fabricated from a shell material, wherein the envelope includes at least one edge with a radius of curvature of less than 3 mm, and wherein the envelope includes, or is in thermal communication with, at least one heat-rejection surface; (b) a porous wick fabricated from a ceramic or metallic wick material, wherein the porous wick is configured within a first portion of the interior cavity, wherein at least a portion of the porous wick is adjacent to the inner surface, and wherein the porous wick has a bimodal pore distribution comprising an average capillary-pore size from 0.2 microns to 200 microns and an average high-flow pore size from 100 microns to 2 millimeters (the average high-flow pore size is greater than the average capillary-pore size); and (c) a phase-change heat-transfer material contained within the porous wick.
    Type: Grant
    Filed: May 17, 2020
    Date of Patent: December 27, 2022
    Assignee: HRL Laboratories, LLC
    Inventors: Christopher S. Roper, Mark R. O'Masta, Tobias A. Schaedler, Jacob M. Hundley, Tiffany Stewart
  • Patent number: 11539119
    Abstract: A system for an antenna for very low frequency communication includes a surface platform that is configured to move on a surface or to be stationary on the surface, a first conductive cable having a first end coupled to the surface platform, wherein the first conductive cable is electrically conductive, and an aerial platform coupled to a second end of the first conductive cable, wherein the aerial platform comprises an electrically conductive portion electrically coupled to the first conductive cable, wherein for a moving surface platform the aerial platform is towed and has an elevation above the surface, and wherein for a stationary surface platform the aerial platform flies an orbital path above the surface platform.
    Type: Grant
    Filed: April 30, 2020
    Date of Patent: December 27, 2022
    Assignee: HRL LABORATORIES, LLC
    Inventors: Walter S. Wall, Carson R. White, Christopher P. Henry, Hyok J. Song
  • Patent number: 11540399
    Abstract: A method of bonding a double-ended cable to a multi-tier substrate (such as a multi-tier printed circuit board) includes picking up the double-ended cable, and imaging alignment markers on a first head of the double-ended cable, a second substrate of the multi-tier substrate, a second head of the double-ended cable, and a first substrate of the multi-tier substrate. The method also includes aligning the alignment marker on the first head of the cable to the alignment marker on the second substrate of the multi-tier substrate, coupling the first head of the cable to the second substrate, and releasing the first head of the cable. The method further includes aligning the alignment marker on the second head of the cable to the alignment marker on the first substrate of the multi-tier substrate, coupling the second head of the cable to the first substrate, and releasing the second head of the cable.
    Type: Grant
    Filed: February 4, 2021
    Date of Patent: December 27, 2022
    Assignee: HRL LABORATORIES, LLC
    Inventors: Peter Brewer, Aurelio Lopez, Pamela R. Patterson
  • Patent number: 11525878
    Abstract: A superconductor magnetic field effect transistor. The superconductor magnetic field effect transistor may include a sheet of a superconducting material; and a solenoid. The sheet may be substantially flat, and the solenoid may include a plurality of turns, each of the turns being substantially parallel to the sheet. The superconducting material may be a type-II superconducting material.
    Type: Grant
    Filed: November 17, 2020
    Date of Patent: December 13, 2022
    Assignee: HRL Laboratories, LLC
    Inventors: Yeong Yoon, Jongchan Kang
  • Patent number: 11528042
    Abstract: A transmitting circuit. In some embodiment, the transmitting circuit includes a slot antenna and an amplifier. The slot antenna may include a slot in a conductive sheet, and it may have a first resonant frequency, the first resonant frequency being within 20% of a slot frequency which is between a first frequency corresponding, in a first volume, to a wavelength twice the length of the slot, and a second frequency corresponding, in a second volume, to a wavelength twice the length of the slot. The amplifier may be connected to the slot through a connection including a conductive path, between the amplifier and the slot, having a length less than 0.2 times the length of the slot. The magnitude of the output impedance of the amplifier may be less than 0.25 times the magnitude of the impedance of the slot antenna at a first resonant frequency.
    Type: Grant
    Filed: March 15, 2021
    Date of Patent: December 13, 2022
    Assignee: HRL LABORATORIES, LLC
    Inventors: Ryan Quarfoth, Carson White
  • Patent number: 11527482
    Abstract: An electronic assembly comprising a carrier wafer having a top wafer surface and a bottom wafer surface; an electronic integrated circuit being formed in the carrier wafer and comprising an integrated circuit contact pad on the top wafer surface; said carrier wafer comprising a through-wafer cavity having walls that join said top wafer surface to said bottom wafer surface; a component chip having a component chip top surface, a component chip bottom surface and component chip side surfaces, the component chip being held in said through-wafer cavity by direct contact of at least a side surface of said component chip with an attachment metal that fills at least a portion of said through-wafer cavity; said component chip comprising at least one component contact pad on said component chip bottom surface; and a conductor connecting said integrated circuit contact pad and said component contact pad.
    Type: Grant
    Filed: March 26, 2021
    Date of Patent: December 13, 2022
    Assignee: HRL LABORATORIES, LLC
    Inventor: Florian G. Herrault
  • Publication number: 20220389561
    Abstract: A process enables growing thick stoichiometric crystalline and preferably IR-transparent optical PCMO material on Si and other substrates. Sputter deposition is carried out in oxygen-free inert gas (e.g., Ar) environment, which helps to prevent decomposition of the PCMO material over the substrate. In the disclosed process, there is no need to add a seed layer prior to PCMO deposition. Moreover, no post-deposition annealing is needed in a high-temperature and high-pressure oxygen furnace, but an anneal provides certain additional benefits in terms of improved transparency at IR wavelengths. Over a long deposition time for a thick PCMO film on the high temperature (?450° C.) substrates, the PCMO deposition is made repeated cycles of deposition of the PCMO material at the high temperature, each deposition cycle being followed by cooling the PCMO-deposited substrate to a substantially lower temperature (<50° C.).
    Type: Application
    Filed: August 18, 2022
    Publication date: December 8, 2022
    Applicant: HRL Laboratories, LLC
    Inventors: Kyung-Ah SON, Jeong-Sun MOON, Hwa Chang SEO, Richard M. KREMER, Ryan G. QUARFOTH, Jack A. CROWELL, Mariano J. TABOADA, Joshua M. DORIA, Terry B. WELCH
  • Patent number: 11521053
    Abstract: Described is a system for specifying control of a device based on a Bayesian network model. The system includes a Bayesian neuromorphic compiler having a network composition module having probabilistic computation units (PCUs) arranged in a hierarchical composition containing multi-level dependencies. The Bayesian neuromorphic compiler receives a Bayesian network model as input and produces a spiking neural network topology and configuration that implements the Bayesian network model. The network composition module learns conditional probabilities of the Bayesian network model. The system computes a conditional probability and controls a device based on the computed conditional probability.
    Type: Grant
    Filed: February 17, 2020
    Date of Patent: December 6, 2022
    Assignee: HRL LABORATORIES, LLC
    Inventors: Nigel D. Stepp, Aruna Jammalamadaka
  • Patent number: 11522276
    Abstract: A system for subsurface transmission includes an array of very low frequency (VLF) transmitter nodes supported by semi-autonomous maritime, airborne, or space platforms spaced at regular intervals from their nearest neighbors and phased to localize VLF coverage to some desired area on a body of water.
    Type: Grant
    Filed: May 6, 2020
    Date of Patent: December 6, 2022
    Assignee: HRL LABORATORIES, LLC
    Inventors: Carson R. White, Walter S. Wall