Patents Assigned to Hymite A/S
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Publication number: 20100244055Abstract: The disclosure facilitates testing and binning of multiple LED chip or other optoelectronic chip packages fabricated on a single semiconductor wafer. The testing can take place prior to dicing. For example, in one aspect, metallization on the front-side of a semiconductor wafer electrically connects together cathode pads (or anode pads) of adjacent sub-mounts such that the cathode pads (or anode pads) in a given column of sub-mounts are electrically connected together. Likewise, metallization on the back-side of the wafer electrically connects together anode pads (or cathode pads) of adjacent sub-mounts such that the anode pads (or cathode pads) in a given row of sub-mounts are electrically connected together. Probe pads, which can be located one or both sides of the wafer, are electrically connected to respective ones of the rows or columns.Type: ApplicationFiled: March 24, 2009Publication date: September 30, 2010Applicant: Hymite A/SInventor: Christoffer G. Greisen
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Publication number: 20100200888Abstract: A package for an optoelectronic device (e.g., a light emitting device such as a LED) includes a sub-mount including a silicon substrate having a thickness in the range of 350 ?m-700 ?m. The optoelectronic device is mounted on a die attach pad on the front-side surface of the substrate. Feed-through metallization in one or more via structures electrically couples the die attach pad to a contact pad on the back-side surface of the substrate.Type: ApplicationFiled: February 12, 2009Publication date: August 12, 2010Applicant: Hymite A/SInventors: Jochen Kuhmann, Heike Huscher
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Publication number: 20100176507Abstract: A submount for a micro-component includes a semiconductor substrate having a cavity defined in a front-side of the substrate in which to mount the micro-component. The submount also includes a thin silicon membrane portion at a bottom of the cavity and thicker frame portions adjacent to sidewalls of the cavity. The substrate includes an electrically conductive feed-through connection extending from a back-side of the substrate at least partially through the thicker silicon frame portion. Electrical contact between the feed-through connection and a conductive layer on a surface of the cavity is made at least partially through a sidewall of the cavity.Type: ApplicationFiled: April 27, 2009Publication date: July 15, 2010Applicant: Hymite A/SInventors: Lior Shiv, John Nicholas Shepherd
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Patent number: 7732829Abstract: A submount for an optoelectronic device includes a substrate, a first top pad on a top surface of the substrate, a first bottom pad on a bottom surface of the substrate and a first wrap-around contact in a sidewall recess of the substrate, in which the first wrap-around contact is coupled electrically to the first top pad and to the first bottom pad. Alternatively, or in addition, the submount includes a device mounting pad on the top surface of the substrate, a wire-bond pad on the top surface of the substrate, a contact pad on the bottom surface of the substrate and a feedthrough contact which extends through the substrate and electrically couples the wire-bond pad to the contact pad.Type: GrantFiled: February 5, 2008Date of Patent: June 8, 2010Assignee: Hymite A/SInventor: Thomas Murphy
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Patent number: 7732240Abstract: Providing through-wafer interconnections in a semiconductor wafer includes forming a sacrificial membrane in a preexisting semiconductor wafer, depositing metallization over one side of the wafer so as to cover exposed portions of the sacrificial membrane facing the one side of the wafer, removing exposed portions of the sacrificial membrane facing the other side of the wafer, and depositing metallization over the other side of the wafer so as to contact the previously deposited metallization. Techniques also are disclosed for providing capacitive and other structures using thin metal membranes.Type: GrantFiled: September 24, 2009Date of Patent: June 8, 2010Assignee: Hymite A/SInventor: Lior Shiv
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Patent number: 7732234Abstract: A method of fabricating a package with a light emitting device includes depositing a first metallization to form a conductive pad on which the light emitting device is to be mounted and to form one or more feed-through interconnections extending through a semiconductor material that supports the conductive pad. Subsequently, a second metallization is deposited to form a reflective surface for reflecting light, emitted by the light emitting device, through a lid of the package. Deposition of the second metallization is de-coupled from deposition of the first metallization.Type: GrantFiled: February 15, 2007Date of Patent: June 8, 2010Assignee: Hymite A/SInventors: Christoffer Graae Greisen, Matthias Heschel, Lior Shiv, Steen Weichel
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Patent number: 7681306Abstract: Formation of a structure with through-holes includes attaching two sub-structures to one another. The resulting structure may be used in a sub-assembly for various types of micro components and may serve as a lid or base of a housing that encapsulates one or more micro components. The techniques may provide greater flexibility in the shape of the through-holes and may reduce costs compared with other known techniques.Type: GrantFiled: April 28, 2004Date of Patent: March 23, 2010Assignee: Hymite A/SInventors: Matthias Heschel, Arnd Kilian
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Patent number: 7662710Abstract: Providing through-wafer interconnections in a semiconductor wafer includes forming a sacrificial membrane in a pre-existing semiconductor wafer, depositing metallization over one side of the wafer so as to cover exposed portions of the sacrificial membrane facing the one side of the wafer, removing exposed portions of the sacrificial membrane facing the other side of the wafer, and depositing metallization over the other side of the wafer so as to contact the previously deposited metallization. Techniques also are disclosed for providing capacitive and other structures using thin metal membranes.Type: GrantFiled: April 6, 2009Date of Patent: February 16, 2010Assignee: Hymite A/SInventor: Lior Shiv
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Publication number: 20100015734Abstract: Providing through-wafer interconnections in a semiconductor wafer includes forming a sacrificial membrane in a preexisting semiconductor wafer, depositing metallization over one side of the wafer so as to cover exposed portions of the sacrificial membrane facing the one side of the wafer, removing exposed portions of the sacrificial membrane facing the other side of the wafer, and depositing metallization over the other side of the wafer so as to contact the previously deposited metallization. Techniques also are disclosed for providing capacitive and other structures using thin metal membranes.Type: ApplicationFiled: September 24, 2009Publication date: January 21, 2010Applicant: Hymite A/SInventor: Lior Shiv
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Publication number: 20090321760Abstract: A wafer-level method of fabricating an opto-electronic component package, in which the opto-electronic component is mounted to a semiconductor wafer having first and second surfaces on opposite sides of the wafer. The method includes etching vias in the first surface of the semiconductor wafer. The first surface and surfaces in the vias are metallized, and the metal is structured to define a thermal pad and to define the anode and cathode contact pads. A carrier wafer is attached on the side of the semiconductor wafer having the first surface, and the semiconductor wafer is thinned from its second surface to expose the metallization in the vias. Metal is provided on the second surface, and the metal is structured to define a die attach pad and additional anode and cathode pads for the opto-electronic component. The opto-electronic component is mounted on the die attach pad and a protective cover is formed over the opto-electronic component.Type: ApplicationFiled: September 23, 2008Publication date: December 31, 2009Applicant: Hymite A/SInventor: Jochen Kuhmann
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Publication number: 20090194777Abstract: A submount for an optoelectronic device includes a substrate, a first top pad on a top surface of the substrate, a first bottom pad on a bottom surface of the substrate and a first wrap-around contact in a sidewall recess of the substrate, in which the first wrap-around contact is coupled electrically to the first top pad and to the first bottom pad. Alternatively, or in addition, the submount includes a device mounting pad on the top surface of the substrate, a wire-bond pad on the top surface of the substrate, a contact pad on the bottom surface of the substrate and a feedthrough contact which extends through the substrate and electrically couples the wire-bond pad to the contact pad.Type: ApplicationFiled: February 5, 2008Publication date: August 6, 2009Applicant: HYMITE A/SInventor: Thomas Murphy
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Publication number: 20090191704Abstract: Providing through-wafer interconnections in a semiconductor wafer includes forming a sacrificial membrane in a pre-existing semiconductor wafer, depositing metallization over one side of the wafer so as to cover exposed portions of the sacrificial membrane facing the one side of the wafer, removing exposed portions of the sacrificial membrane facing the other side of the wafer, and depositing metallization over the other side of the wafer so as to contact the previously deposited metallization. Techniques also are disclosed for providing capacitive and other structures using thin metal membranes.Type: ApplicationFiled: April 6, 2009Publication date: July 30, 2009Applicant: Hymite A/SInventor: Lior Shiv
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Patent number: 7553695Abstract: Techniques are disclosed for fabricating a relatively thin package for housing a micro component, such as an opto-electronic or MEMs device. The packages may be fabricated in a wafer-level batch process. The package may include hermetically sealed feed-through electrical connections coupling the micro component to electrical contacts on an exterior surface of the package.Type: GrantFiled: March 17, 2005Date of Patent: June 30, 2009Assignee: Hymite A/SInventors: Lior Shiv, Kristian Blidegn
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Patent number: 7543999Abstract: An optical module comprising an opto-electronic component, a lens and a mirror that is hermetically sealed by a micro housing containing a lid and a base is disclosed. The optical module may be assembled onto a moveable holder for aligning an optical beam into an optical assembly having an optical waveguide.Type: GrantFiled: September 12, 2005Date of Patent: June 9, 2009Assignee: Hymite A/SInventors: Marcus Winter, Ralf Hauffe, Arnd Kilian
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Patent number: 7531445Abstract: Providing through-wafer interconnections in a semiconductor wafer includes forming a sacrificial membrane in a pre-existing semiconductor wafer, depositing metallization over one side of the wafer so as to cover exposed portions of the sacrificial membrane facing the one side of the wafer, removing exposed portions of the sacrificial membrane facing the other side of the wafer, and depositing metallization over the other side of the wafer so as to contact the previously deposited metallization. Techniques also are disclosed for providing capacitive and other structures using thin metal membranes.Type: GrantFiled: January 31, 2007Date of Patent: May 12, 2009Assignee: Hymite A/SInventor: Lior Shiv
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Patent number: 7528422Abstract: A package includes a substrate with a recess in which a light emitting element is mounted. A surface of the substrate forms an exterior surface of the package. A lid may be attached to the substrate to define a sealed region in which the light emitting element is mounted. The lid is transparent to a wavelength of light emitted by the light emitting element. Electrostatic discharge protection circuitry in the substrate is electrically coupled to the light emitting element.Type: GrantFiled: January 20, 2006Date of Patent: May 5, 2009Assignee: Hymite A/SInventor: Thomas Murphy
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Publication number: 20090101897Abstract: A high-brightness LED module includes a substrate with a recess in which a light emitting element is mounted. The recess is defined by a sidewalls and a relatively thin membrane. At least two micro-vias are provided in the membrane and include conductive material that passes through the membrane. A p-contact of the light emitting element is coupled to a first micro-via and an n-contact of the light emitting element is coupled to a second micro-via.Type: ApplicationFiled: October 23, 2008Publication date: April 23, 2009Applicant: HYMITE A/SInventors: Thomas Murphy, Andreas A. Hase, Matthias Heschel
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Patent number: 7470622Abstract: A method of fabricating silicon micro-mirrors includes etching from opposite sides of a silicon wafer with a polished surface on at least one of the opposite sides, to form silicon bars each having a parallelogram-shaped cross-section and including a portion of the polished surface. At least one of the silicon bars is mounted on a mounting surface. The polished surface of the silicon bar may be used to reflect optical signals.Type: GrantFiled: June 17, 2005Date of Patent: December 30, 2008Assignee: Hymite A/SInventor: Lior Shiv
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Patent number: 7467897Abstract: An optical module, such as a package for a vertical cavity surface emitting laser diode (VCSEL) or other light emitting device, includes monitoring of the emitted optical power by tapping the transmitted beam. The module includes a substrate, which carries the light emitting device and an optical monitor. In addition, the module includes a transparent plate with at least two reflective regions that together redirect part of the light from the light emitting device to the optical monitor.Type: GrantFiled: December 4, 2006Date of Patent: December 23, 2008Assignee: Hymite A/SInventors: Ralf Hauffe, Arnd Kilian
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Patent number: 7419853Abstract: A package includes a sensor die with a micro component, such as a MEMS device, coupled to an integrated circuit which may include, for example, CMOS circuitry, and one or more electrically conductive bond pads near the periphery of the sensor die. A semiconductor cap structure is attached to the sensor die. The front side of the cap structure is attached to the sensor die by a seal ring to hermetically encapsulate an area of the sensor die where the micro component is located. The bond pads on the sensor die are located outside the area encapsulated by the seal ring. Electrical leads, which extend along outer side edges of the semiconductor cap structure from its front side to its back side, are coupled to the micro component via the bond pads.Type: GrantFiled: August 11, 2005Date of Patent: September 2, 2008Assignee: Hymite A/SInventors: Jochen Kuhmann, Matthias Heschel