Abstract: A nonvolatile memory device and driving method comprises a plurality of cell array blocks, each cell array block including a plurality of sub-cell array blocks, each sub-cell array block including a plurality of unit cells, a plurality of main bitlines formed in the sub-cell array blocks in one direction, a plurality of sub-bitlines aligned in the sub-cell array blocks in a same direction of the main bitlines so as to be connected to terminals of the unit cells to induce voltages on the unit cells, respectively, a sense amplifier block having a plurality of sense amplifiers shared in common by a plurality of the cell array blocks to amplify a signal of each of the main bitlines, and at least one switching transistor formed at least at one of each cell array block, the transistor having a gate controlled by a corresponding one of the sub-bitline which receives a voltage value induced from the unit cell, a drain connected to a corresponding one of the main bitlines, and a source connected to a ground voltage te