Abstract: A method of packaging micro-LEDs onto a substrate including: microfabricating micro-LEDs on a transparent microdevice substrate with an epitaxial layer, aligning a test substrate with test electrodes to connect to the micro-LEDs, and injecting a current to capture brightness information and map healthy and defective micro-LEDs. The test substrate is removed, and a photo-sensitive polymer is coated on the microdevice substrate and optically patterned to remove the polymer around defective micro-LEDs. A receiver substrate with pads is forced toward the microdevice substrate such that at least one pad penetrates the polymer to contact a healthy micro-LED, and the polymer fills any gap. The polymer surrounding the healthy micro-LED is cured to bond it to the receiver substrate and achieve lift-off from the microdevice substrate, which is then moved away.

Abstract: An optical interconnect system comprising: a primary substrate; one or more light sources for emitting light fabricated on the primary substrate; at least one communication medium for transmitting the light, wherein the at least one communication medium is separated from the one or more light sources by a predefined distance; the at least one communication medium comprising a numerical aperture, and wherein the numerical aperture, the one or more light sources, and the at least one communication medium, are dimensioned to minimize loss of optical power coupling of the emitted light into the at least one communication medium; and wherein the predefined distance is selected such that the emitted light is coupled into the at least one communication medium without an optical component.

Abstract: A driver circuit for supplying and regulating power to a micro light-emitting diode (micro-LED), the driver circuitry comprising: at least one inverter; a first capacitance; a resistor coupled to ground; a fast switch comprising at least one first transistor; and a slow switch comprising at least one second transistor; whereby at least one of a rising time, a peaking effect, and LED power is increased.

Abstract: A semiconductor device comprising: a silicon substrate; at least one P+/N-well structure formed on the substrate, the at least one P+/N-well structure comprising a first set of N-well layers coupled to an extra positive extrinsic electric field, and a second set of N-well layers coupled to an extra negative extrinsic electric field; and whereby the extra positive extrinsic electric field and the extra negative extrinsic electric field accelerate movement of carriers in the layers.

Abstract: A method for fabricating a high-speed semiconductor device, the method comprising the steps of: providing a light emitting device structure on substrate, activated p-doped; etching grooves on the p-doped layer, partially or fully filling the grooves with noble metal; and constructing at least one top emitting flip chip light emitting device and/or at least one bottom emitting flip chip light emitting device.

Abstract: A method for fabricating a semiconductor device, the method comprising the steps of: providing a silicon-on-insulator (SOI) substrate, the SOI substrate comprising a groove exposing different crystal facing a planar surface; depositing a buffer layer over the substrate; epitaxially growing a semiconductor layer over the buffer layer, whereby least a portion of the buffer layer exhibits a cubic crystalline phase structure.

Abstract: A silicon-based complementary metal-oxide semiconductor (CMOS) photodetector (PD) comprising: a silicon substrate; at least one PN junction formed on the substrate; stacked metal layers and/or dummy transistors in a perimeter of the entire photodetector (PD) or a perimeter of local components of photodetector (PD) within the entire photodetector (PD) to increase efficiency and responsivity of the CMOS photodetector.

Abstract: An optical interconnect system comprising: at least one light source for emitting light, the light comprising a distribution pattern having a predefined divergence angle; at least one communication medium for transmitting the light, wherein the at least one communication medium comprises a numerical aperture, and wherein at least one of the numerical aperture, the at least one light source, the predefined divergence angle, and the at least one communication medium, is dimensioned to minimize loss of optical power coupling of the light into the at least one communication medium; at least one light detector for receiving the light from the at least one communication medium; at least one optomechanical alignment system configured to optimize collection of the light at the least one light detector.

Abstract: A parallel interconnect system for transmitting data comprising: a plurality of light sources for emitting light for use as a carrier for the data; a first optical transceiver array having at least one optical transmitter; at least one fiber array configured to transmit light emitted by the at least one optical transmitter; an first optical coupler configured to couple the plurality of light sources to one end of the at least one fiber array; a second optical transceiver array having at least one optical receiver; a second optical coupler configured to receive and direct the transmitted light from another end of at least one fiber array to the second optical transceiver array.

Abstract: A multi-layer display including an upper substrate including light emitting diodes (LEDs) fabricated on a topside of the upper substrate, and LED bonding pads fabricated on a bottomside of the upper substrate. The LED bonding pads being electrically connected to the LEDs through vias extending through the upper substrate. The display also including a lower substrate including LED driver circuits and driver bonding pads fabricated on a topside of the lower substrate. The driver bonding pads being electrically connected to the LED driver circuits, where the LED bonding pads and driver bonding pads are aligned and electrically connected to each other, thereby electrically connecting the LED driver circuits to the LEDs.

Abstract: In order to enable applications such as artificial intelligence (AI) and machine learning in a large scale, a large amount of information needs to be processed very fast. To improve the speed of the computation, not only faster graphical and central processors are required, but also the communication between processors and high bandwidth memories should be fast enough to reduce the latency. Optical interconnect can be a replacement for copper interconnect which is providing larger bandwidth and lower latency. As an efficient light source, micro-LEDs can be used as light source for chip-to-chip optical interconnect. Using a massively parallel memory-processor interconnect using low-power micro-LED, the computation speed will increase dramatically, and less amount of energy will be wasted through copper self-heating.

Abstract: Selective bonding integrates semiconductor devices onto a receiver substrate. A laser releases devices from a substrate according to a pattern. The pattern syncs laser frequency and speed/location of the stage with the receiver substrate, or uses a diffractive optical element and pottering, or masks the emitted laser to a desired size/shape. Laser steering employs digital micromirror devices or fast scanning mirrors followed by an f-theta lens. Sequential selective bonding and laser processing enables full-colour display by transferring violet or blue micro-LEDs and employing colour-conversion layers or sequentially patterning red, green, and blue sub-pixels. The same method transfers driving circuits onto a substrate. A pattern from defective devices is generated after test and used for repair. A second round prints micro-devices onto pads in or beside defective devices.