Abstract: The invention relates to a method for managing the erasure process in a memory system comprising individually erasable memory blocks (SB) that can be addressed with the aid of real memory block addresses (SBA). Said memory blocks are sub-divided into a plurality of writable sectors and can be addressed by means of an address conversion that uses an allocator table (ZT) to convert logical block addresses (LBA) into one of the respective memory block addresses (SBA). According to the invention, the allocator table (ZT) is sub-divided into at least one useful data area (NB) and a buffer block area (BB). The invention is characterised in that a first identifier erased (ER), indicating the physical erasure status and a second identifier content erased (CER), indicating the logical erasure status, is set for each memory block (SB) in the allocator table (ZT).

Abstract: The invention relates to a method for the management of defective memory blocks in a non-volatile memory system comprising individually erasable memory blocks (SB) that can be addressed with the aid of real memory block addresses (SBA). Said memory blocks can be addressed by means of an address conversion that uses an allocator table (ZT) to convert logical block addresses (LBA) into one of the respective memory block addresses (SBA). According to the invention, the allocator table (ZT) is sub-divided into at least one useful data area (NB), a buffer block area (BB), a defect area (DB) and a reserve area (RB). If an error occurs during the erasure process, the relevant block is replaced by a reserve block and its memory block address is written to the defect area (DB).

Abstract: The invention relates to a method for writing memory sectors in individually-deletable memory blocks (SB), comprising a number of memory sectors, whereby access to the physical sectors is achieved by means of an allocation table (ZT) for address conversion of a logical address (LA) into a physical block address (RBA) and a physical sector address (RSA) and whereby, when a sector write command is to be carried out, which relates to an already written sector, the writing takes place to an alternative memory block (AB), by means of an altered address conversion, said writing processes for sectors in the alternative memory block (AB) being carried out sequentially and the position of the relevant sector in the alternative block (AB) is stored in a sector table.

Abstract: The invention relates to a method for restoring administrative data records of a non-volatile memory that can be written in segments and erased in blocks, said records being stored in a more rapidly accessible internal volatile flag memory of an assigned memory controller. According to the invention, a reconstruction table (RKT), in which the extent of all write and erase operations is recorded as an entry, is continuously updated. This permits each administrative data record of the internal flag memory of the memory controller to be completely reconstructed during a restart after a power failure.

Abstract: The invention relates to a memory system which is configured with a plurality of memory controllers (SCx), disposed in parallel on a clocked bus (B), and memory chips (Fx) associated with the respective memory controllers (SCx). The system communicates via the bus (B) with a host system (HS) by means of operational memory commands using logical memory sector numbers. The inventive system is characterized in that for any memory operation requested by the host system (HS) the memory controller (SCx) affected with respect to a range of logical memory sector numbers (SCx) takes over the bus for communication with the host system (HS) by means of arbitration.

Abstract: The present invention relates to a method for controlling the access, in a computer, of a memory having an erasure frequently limited by blocks. This memory contains utility memory blocks (NB0, NB1) which are available for a user's access by an address conversion occurring through a pointer panel (AZTO). An erasure utility category (LN0, LN1023) is maintained in the form of a table in association with each address pointer maintained in the form of a table in association with each address pointer (AP0 AP1023). This erasure utility category is increased every time a predetermined erasure-state criteria is reached. The other pointing positions of the erasure utility categories (LN0 LN1023) are further explored in the pointer panel (AZTO) until a lower erasure utility category is found. The corresponding address pointer (AP0 AP1023) is then permuted with the one located at the output with the one located at the output pointer position (AP1).