Abstract: The invention relates to a method for managing the erasure process in a memory system comprising individually erasable memory blocks (SB) that can be addressed with the aid of real memory block addresses (SBA). Said memory blocks are sub-divided into a plurality of writable sectors and can be addressed by means of an address conversion that uses an allocator table (ZT) to convert logical block addresses (LBA) into one of the respective memory block addresses (SBA). According to the invention, the allocator table (ZT) is sub-divided into at least one useful data area (NB) and a buffer block area (BB). The invention is characterised in that a first identifier erased (ER), indicating the physical erasure status and a second identifier content erased (CER), indicating the logical erasure status, is set for each memory block (SB) in the allocator table (ZT).

Abstract: The present invention relates to a method for controlling the access, in a computer, of a memory having an erasure frequently limited by blocks. This memory contains utility memory blocks (NB0, NB1) which are available for a user's access by an address conversion occurring through a pointer panel (AZTO). An erasure utility category (LN0, LN1023) is maintained in the form of a table in association with each address pointer maintained in the form of a table in association with each address pointer (AP0 AP1023). This erasure utility category is increased every time a predetermined erasure-state criteria is reached. The other pointing positions of the erasure utility categories (LN0 LN1023) are further explored in the pointer panel (AZTO) until a lower erasure utility category is found. The corresponding address pointer (AP0 AP1023) is then permuted with the one located at the output with the one located at the output pointer position (AP1).