Abstract: A two port cartridge valve comprises a valve sleeve with a two-step guide hole, a valve piston, which forms a closing element for a valve seat, and a piston shoulder, which divides the second step of the guide hole axially into an end-side first control chamber and an annular second control chamber. An auxiliary piston is fitted in an inner guide hole of the piston shoulder. The cross-section A.sub.s of the inner guide hole is the same size as or larger than the cross-section A.sub.c of the first step sealed by the valve piston. The piston shoulder forms an annular pressure area A.sub.X in the first control chamber. A connecting hole connects the inner guide hole to an orifice in the end face of the valve piston. The valve is used to achieve by means of the pressure to be shut off a hermetic shut-off function. It can be hydraulically locked and unlocked by a pilot valve.

Abstract: A semiconductor device including outer pins including power pins adapted to supply a source voltage or a ground voltage, data pins adapted to input and output data and classified into a plurality of data pin groups having the same number of data pins, and output voltage pins adapted to supply output voltages of data pins of the data pin groups respectively associated therewith, wherein each of the output voltage pins is arranged between a pair of sub-groups constituting one of the data pin groups associated therewith, thereby capable of minimizing a resistance generated between each output voltage pin and each of data pins driven by the output voltage pin and achieving an improvement in data output characteristic.

Abstract: A method for fabricating a storage electrode of a DRAM cell capable of preventing impurities from excessively moving from the storage electrode to diffusion regions. The storage electrode is formed by a double formation of polysilicon layers. An undoped polysilicon layer 11 is primarily deposited over the entire exposed surface of the resulting structure to a thickness corresponding to 40 to 50% of a predetermined thickness of the storage electrode. A doped polysilicon layer is secondarily deposited over the undoped polysilicon layer to a thickness corresponding to 60 to 50% of the predetermined thickness of the storage electrode. The doped polysilicon layer and the undoped polysilicon layer are subjected to a patterning so that predetermined portions thereof are removed so as to form the storage electrode.

Abstract: A DRAM having a vertical transistor of a highly integrated semiconductor device and its manufacturing method are disclosed. A DRAM has a silicon substrate, a word line formed in a silicon substrate, a gate oxide layer formed on the side wall of the word line, a bit line junction region formed on the bottom of a silicon substrate, a bit line that is connected to the a bit line junction region and is insulated from the word line via a first insulating layer, a charge storage electrode junction region formed near the bottom of silicon substrate surface, a pad polysilicon layer that is insulated from the a word line via a second insulating layer and is connected at the top of a charge storage electrode diffusion region, and a charge storage electrode that is connected to the pad polysilicon layer through a contact.