Patents Assigned to I & F Inc.
  • Semiconductor circuit for arithmetic processing and arithmetic processing method
    Patent number: 7296048
    Abstract: There is provided a semiconductor circuit for arithmetic processing and an arithmetic processing method that can increase the rate of processing data and reduces the area of a circuit by suppressing wasteful processing. There is provided a computing unit for computing input data, and this computing unit computes input digit data within a computation time unit and outputs a computation result representing a result obtained by the computation, and if a carry is generated in the computation a computation circuit (adders 1–3) for outputting carry data representing this carry, and delay means (memory 4) for delaying the computation result from the computation circuit by one computation time unit, are provided.
    Type: Grant
    Filed: August 15, 2003
    Date of Patent: November 13, 2007
    Assignees: Kabushiki Kaisha Ultraclean Technology Research Institute, I & F, Inc.
    Inventors: Tadahiro Ohmi, Makoto Imai, Toshiyuki Nozawa, Masanori Fujibayashi, Koji Kotani, Tadashi Shibata, Takahisa Nitta
  • Semiconductor circuit for arithmetic operation and method of arithmetic operation
    Patent number: 6728745
    Abstract: There is provided a semiconductor circuit for arithmetic processing and an arithmetic processing method that can increase the rate of processing data and reduces the area of a circuit by suppressing wasteful processing. There is provided a computing unit for computing input data within a computation time unit and outputs a computation result representing a result obtained by the computation, and if a carry is generated in the computation a computation circuit (adders 1-3) for outputting carry data representing this carry, and delay means (memory 4) for delaying the computation result from the computation circuit by one computation time unit, are provided.
    Type: Grant
    Filed: September 6, 2000
    Date of Patent: April 27, 2004
    Assignees: Kabushiki Kaisha Ultraclean Technology Research Institute, I & F, Inc.
    Inventors: Tadahiro Ohmi, Makoto Imai, Toshiyuki Nozawa, Masanori Fujibayashi, Koji Kotani, Tadashi Shibata, Takahisa Nitta
  • Semiconductor arithmetic unit
    Patent number: 6704757
    Abstract: A semiconductor arithmetic unit which realizes a maximum or minimum value retrieval operation at high speed and with a high degree of accuracy used in a vector quantization processor is composed of a binary-multivalue-analog merged operation processing circuit. A multi-loop circuit includes an amplifying circuit group composed of a plurality of sets of first amplifiers with a floating gate to which first electrodes and a single second electrode are capacitively coupled with a predetermined ratio, a logical operation circuit to which output signals of the amplifying circuit group are inputted and which outputs a logical 0 or 1, and a second amplifying circuit to which an output signal of the logical operation circuit is inputted and whose output is distributed to all of the second electrodes of the amplifying circuit group.
    Type: Grant
    Filed: January 2, 2001
    Date of Patent: March 9, 2004
    Assignees: UCT Corporation, I&F Inc.
    Inventors: Tadahiro Ohmi, Tadashi Shibata, Akira Nakada, Tatsuro Morimoto, Takahisa Nitta
  • Semiconductor memory device
    Patent number: 6456532
    Abstract: The present invention is intended to provide a semiconductor memory circuit that can store analog and many-valued data at high speed and with a high degree of accuracy.
    Type: Grant
    Filed: February 7, 2001
    Date of Patent: September 24, 2002
    Assignees: Tadahiro Ohmi, Tadashi Shibata, UCT Corporation, I & F Inc.
    Inventors: Tadahiro Ohmi, Tadashi Shibata, Keng Hoong Wee, Takemi Yonezawa, Toshiyuki Nozawa, Takahisa Nitta
  • Boxed, protected candy or chocolate egg
    Patent number: D457057
    Type: Grant
    Filed: May 22, 2001
    Date of Patent: May 14, 2002
    Assignee: C.I.F. Inc.
    Inventor: Filippo Vigneri