Abstract: A method of producing a layer of cavities in a structure comprises at least one substrate formed from a material that can be oxidized or nitrided, the method comprising the following steps: implanting ions into the substrate in order to form an implanted ion concentration zone at a predetermined mean depth; heat treating the implanted substrate to form a layer of cavities at the implanted ion concentration zone; and forming an insulating layer in the substrate by thermochemical treatment from one surface of the substrate, the insulating layer that is formed extending at least partially into the layer of cavities.

Abstract: A method for fabricating a semiconductor on insulator substrate by providing a first semiconductor substrate with a first impurity density of a first impurity type, subjecting the first semiconductor substrate to a first thermal treatment to thereby reduce the first impurity density in a modified layer adjacent a surface of the first semiconductor substrate being treated, transferring at least partially the modified layer with the reduced first impurity density onto a second substrate, to thereby obtain a modified second substrate, and providing a further layer on a transferred layer of the modified second substrate with the further layer having a second impurity density of a second impurity type that is different than the first impurity type of the transferred modified layer. By doing so, a contamination by dopants of the second impurity type of a fabrication line using semiconductor material with dopants of the first impurity type, can be prevented.

Abstract: A method for manufacturing a hybrid semiconductor substrate comprises the steps of (a) providing a hybrid semiconductor substrate comprising a semiconductor-on-insulator (SeOI) region, that comprises an insulating layer over a base substrate and a SeOI layer over the insulating layer, and a bulk semiconductor region, wherein the SeOI region and the bulk semiconductor region share the same base substrate; (b) providing a mask layer over the SeOI region; and (c) forming a first impurity level by doping the SeOI region and the bulk semiconductor region simultaneously such that the first impurity level in the SeOI region is contained within the mask. Thereby, a higher number of process steps involved in the manufacturing process of hybrid semiconductor substrates may be avoided.

Abstract: The invention relates to a method for manufacturing components on a mixed substrate. It comprises the following steps: —providing a substrate of the semiconductor-on-insulator (SeOI) type comprising a buried oxide layer between a supporting substrate and a thin layer, —forming in this substrate a plurality of trenches opening out at the free surface of the thin layer and extending over a depth such that it passes through the thin layer and the buried oxide layer, these primary trenches delimiting at least one island of the SeOI substrate, —forming a mask inside the primary trenches and as a layer covering the areas of the free surface of the thin layer located outside the islands, —proceeding with heat treatment for dissolving the buried oxide layer present at the island, so as to reduce the thickness thereof.

Abstract: The present invention provides methods for relaxing a strained-material layer and structures produced by the methods. Briefly, the methods include depositing a first low-viscosity layer that includes a first compliant material on the strained-material layer, depositing a second low-viscosity layer that includes a second compliant material on the strained-material layer to form a first sandwiched structure and subjecting the first sandwiched structure to a heat treatment such that the reflow of the first and the second low-viscosity layers permits the strained-material layer to at least partly relax.

Abstract: Semiconductor wafers having a thin layer of strained semiconductor material. These structures include a substrate; an oxide layer upon the substrate; a silicon carbide (SiC) layer upon the oxide layer, and a strained layer of a semiconductor material in a strained state upon the silicon carbide layer, or a matching layer upon the donor substrate that is made from a material that induces strain in subsequent epitaxially grown layers thereon; a strained layer of a semiconductor material of defined thickness in a strained state; and an insulating or semi-insulating layer upon the strained layer in a thickness that retains the strained state of the strained layer. The insulating or semi-insulating layers are made of silicon carbide or oxides and act to retain strain in the strained layer.

Abstract: The invention relates to a method for producing a semiconductor structure comprising a superficial layer, at least one embedded layer, and a support, which method comprises: a step of forming, on a first support, patterns in a first material, a step of forming a semiconductor layer, between and on said patterns, a step of assembling said semiconductor layer with a second support.

Abstract: The invention relates to a method for finishing the surface of semiconducting substrate that has a set of layers and a useful semiconducting layer on at least one of the faces of the substrate, wherein the useful layer has a rough free surface. The method smoothes out the rough free surface of the useful layer by creating a protective layer covering the surface of the useful layer with a thickness 1 to 3 times larger than the peak-to-valley distance of the surface of the useful layer, at least one polishing-oxidation sequence that includes the successive steps of polishing the surface of the protective layer, with the polishing being adjusted so as not to attack the useful layer, and performing a thermal oxidation with supply of oxygen gas of the substrate in order to transform a portion of the useful layer into an oxide layer and reduce the roughness of the surface of the useful layer.

Abstract: In preferred embodiments, the invention provides substrates that include a support, a first insulating layer arranged on the support, a non-mono-crystalline semi-conducting layer arranged on the first insulating layer, a second insulating layer arranged on the non-mono-crystalline semi-conducting layer; and top layer disposed on the second insulating layer. Additionally, a first gate electrode can be formed on the top layer and a second gate electrode can be formed in the non-mono-crystalline semi-conducting layer. The invention also provides methods for manufacture of such substrates.

Abstract: A method and/or system are provided for producing a structure comprising a thin layer of semiconductor material on a substrate. The method includes creating an area of embrittlement in the thickness of a donor substrate, bonding the donor substrate with a support substrate and detaching the donor substrate at the level of the area of embrittlement to transfer a thin layer of the donor substrate onto the support substrate. The method also includes thermal treatment of this resulting structure to stabilize the bonding interface between the thin layer and the substrate support. The invention also relates to the structures obtained by such a process.

Abstract: The invention relates to a test method comprising an electrical connection contact on the support of a substrate of the semiconductor-on-insulator type. This method is remarkable in that it comprises the steps of: a) taking a substrate of the semiconductor-on-insulator type comprising a support substrate entirely covered with an insulator layer and an active layer, a portion of the insulator layer being buried between the active layer and the front face of the support substrate, b) removing a portion of the insulator layer that extends at the periphery of the front face of the support substrate and/or that extends on its rear face, so as to delimit at least one insulator-free accessible area of the support substrate, while retaining at least one portion of the insulator layer on the rear face, c) applying an electrical voltage to the accessible area in order to make the electrical connection contact.

Abstract: The invention relates to a process for fabricating a multilayer structure (130) comprising: bonding a first wafer onto a second wafer, at least the first wafer having a chamfered edge; and thinning the first wafer so as to form in a transferred layer, the thinning comprising a grinding step and a chemical etching step. After the grinding step and before the chemical etching step, a trimming step of the edge of the first wafer is carried out using a grinding wheel, the working surface of which comprises grit particles having an average size of less than or equal to 800 mesh or greater than or equal to 18 microns, the trimming step being carried out to a defined depth in the first wafer so as to leave a thickness of the first wafer of less than or equal to 35 ?m in the trimmed region.

Abstract: A method for thinning a structure of at least two assembled wafers, where one of the wafers includes channels on its surface facing the other wafer. In order to cause thinning of the structure, a fluid is introduced into the channels in a supercritical state and the fluid is passed from the supercritical state into the gaseous state. The channels do not open to the outside of the structure, such that the method further includes forming at least one access opening to the channels from the outer surface of the structure and before introducing the fluid in the supercritical state.

Abstract: In one embodiment, the disclosure relates to an electronic device successively comprising from its base to its surface: (a) a support layer, (b) a channel layer adapted to contain an electron gas, (c) a barrier layer and (d) at least one ohmic contact electrode formed by a superposition of metallic layers, a first layer of which is in contact with the barrier layer. The device is remarkable in that the barrier layer includes a contact region under the ohmic contact electrode(s). The contact region includes at least one metal selected from the metals forming the superposition of metallic layers. Furthermore, a local alloying binds the contact region and the first layer of the electrode(s).

Abstract: The invention relates to a method of fabricating a release substrate produced from semiconductor materials, the method comprising creating a reversible connection between two substrate release layers characterized in that the reversible connection is formed by a connecting layer produced using a first material as the basis, the connecting layer further comprising a nanoparticle concentrating zone of a second material disposed to facilitate release of the substrate, the first and second materials being selected to maintain the bonding energy of the reversible connection substantially constant even when the substrate is exposed to heat treatment.

Abstract: An apparatus for measuring a lifetime of charge carriers that has a measuring probe and a component for directing ultraviolet radiation to a measuring position. The measuring probe also includes at least one electrode provided at a predetermined spatial relationship to the measuring position. A microwave source is adapted to direct microwave radiation to the measuring position, a microwave detector is adapted to measure an alteration of an intensity of microwave radiation reflected at the measuring position in response to the ultraviolet radiation and a semiconductor structure holder is adapted to receive a semiconductor structure and to provide an electric contact to a portion of the semiconductor structure. Additionally, a device for moving the substrate holder relative to the measuring probe is provided for positioning at least one portion of the semiconductor structure at the measuring position.

Abstract: The present invention provides a robust, durable and reliable cylindrical valve having closable, radially extending openings for use in cementing, injection, including hydraulic fracturing, and production in wells having high pressures and large pressure differences. The valve may comprise scraping rings in order to remove deposits and the like when it is to be closed after use. Magnets or other suitable means indicates whether the valve is in an open or closed position.

Abstract: A process for splitting a semiconductor substrate having an identification notch on its periphery, by creating a weakened zone in the substrate by implanting atomic species into the substrate while the substrate is held in place on a portion of its periphery during the implanting; and splitting the substrate along the weakened zone by placing the held portion of the substrate in a splitting-wave initiation sector while positioning the notch for initiating a splitting wave followed by the propagation of the wave into the substrate. During splitting the notch is positioned so that it is in a quarter of the periphery of the substrate diametrically opposite the sector for initiating the splitting wave or in the quarter of the periphery of the substrate that is centered on the sector.

Abstract: Apparatus for a drop ball activated device, where a ball seat is concentrically and axially slidably disposed within an outer sleeve having a first internal cylindrical surface, wherein the ball seat comprises at least one radially extending lug, which in a first position extends radially inwards from the internal cylindrical surface, thereby defining a first ball seat diameter less than the diameter of the drop ball. The sleeve comprises at least one groove in its internal surface, and the lug may be received in the groove, thereby defining a second ball seat diameter at least as large as the diameter of the drop ball.

Abstract: The present invention notably concerns a method to fabricate and treat a structure of semiconductor-on-insulator type, successively comprising a carrier substrate (1), an oxide layer (3) and a thin layer (2) of semiconducting material, according to which: 1) a mask is formed on said thin layer (2) so as to define exposed regions (20), on the surface of said layer, which are not covered by the mask; 2) heat treatment is applied so as to urge at least part of the oxygen of the oxide layer (3) to diffuse through the thin layer (2), leading to controlled removal of the oxide in the regions (30) of the oxide layer (3) corresponding to the desired pattern; characterized in that said carrier substrate (1) and thin layer (2) are arranged relative to each other so that their crystal lattices, in a plane parallel to their interface (I), together form an angle called a “twist angle” of no more than 1°, and in a plane perpendicular to their interface (I) an angle called a “tilt angle” of no more than 1°, and in that a th