Abstract: This invention relates to the use of a combination of selected substances in paint to prevent the settlement and growth of different biofouling organisms with a reduced negative effect on the ecosystems compared to present methods.

Abstract: Disclosed is an electroless metal film-plating system. While polyimide film is continuously fed from a roll, a series of wetting processes, including a degreasing process, an etching process, a neutralizing process, a coupling process, a catalyst-adding process, an undercoating process, and a plating process are conducted, in order, so as to plate one or both surfaces of the film with a conductive metal, followed by drying the conductive metal-plated film and taking up the plated film into a roll. A wetting process, in which the film passes through a liquid solution and is repetitively immersed in and drawn from a washing solution, is applied to all process parts, several parts notwithstanding, to produce a bilayer structure FCCL exhibiting superior physical properties such as peel strength. Also, after immersion in liquid in each process, the liquid is removed using wringing rollers so as to coat the material of interest at a uniform thickness.

Abstract: A stent includes a cylindrical main body contractible and expandable in a circumferential direction, a cover member coated on inner and/or outer circumference of the main body, and an inverse current preventing member for preventing food or fluid from reversely flowing. The inverse current preventing member is disposed in the main body and includes a fixing layer defining a passage having a diameter capable of allowing food and fluid to pass, the fixing layer being fixed in the main body and a valve layer extending from the fixing layer to a distal end of the main body.

Abstract: Multiple channels of a multi-channel analyzer are allocated among multiple users such that each user can initiate and retrieve the results of separate diagnostic sessions. Each analyzer channel includes an input connection port, a trace buffer memory and logic circuitry. Each input connection port is operably connected to a unique node in the communication network. A host processor connected to each analyzer channel assigns ownership of a unique set of analyzer channel to at least two different users such that each user can initiate separate traces that are simultaneously established on the connection port at each node in accordance with a set of instructions established by the user assigned to the analyzer channel for that node, and the traces are captured in response to the set of instructions for each analyzer channel such that each user retrieves only the results of the analyzer channels assigned to that user.

Abstract: The invention relates to improvements in a process and annealing device for cleaving a wafer layer along a weakened zone in a donor wafer using a thermal anneal. In one improvement, at least one donor wafer is provided in a substantially horizontal position during the thermal anneal to prepare a wafer layer which, after detachment, has a cleaved surface with reduced surface roughness irregularities. The donor wafer can be preferably placed inside a chamber between two heating electrodes during the thermal anneal. The thermal anneal can be conducted to detach the wafer layer or the donor wafer to mechanical action to detach the wafer layer after the thermal anneal is conducted. Either way, a cleaved surface is provided on the detached wafer layer that does not include isolated dense areas adjacent the wafer layer periphery.

Abstract: An indexing system provides a more efficient and effective interface to display and manipulate large amounts of trace data from computer data and storage networks that is captured and stored in the trace memory of a protocol analyzer. An index of the trace data in the trace memory is generated by reading a selected percentage of the trace data in the trace memory. Hardware circuitry selectively identifies locations in the trace memory of trace data for desired portions of the trace data. A processor utilizes the locations identified by the hardware circuitry to generate an index for the trace data stored in the trace memory. Preferably, the hardware circuitry searches for a first time stamp encountered in each of a series of blocks of trace data and the processor utilizes the first time stamps to build a time index for the series of blocks of trace data.

Abstract: The use of an aromatic compound substituted with at least one heterocyclic amine and possibly additional substituents, such as medetomidine and clonidine, or a functionally analogous derivative thereof, as an agent for the inhibition of marine biofouling on a surface, by application thereon of said compound, is disclosed. Also a method for inhibition of marine biofouling on a surface by application of said compound is disclosed.

Abstract: An indexing system provides a more efficient and effective interface to display and manipulate large amounts of trace data from computer data and storage networks that is captured and stored in the trace memory of a protocol analyzer. An index of the trace data in the trace memory is generated by reading a selected granularity percentage of the trace data in the trace memory. A host processor connected to the protocol analyzer generates at least two graphic representations on a computer display device of the trace data in response to and based on the index. A first graphic representation is generated by setting the selected granularity percentage at a first percentage and a second graphic representation similar to the first graphic representation generated while the first graphic representation is being displayed by setting the selected percentage at a second percentage that is greater than the first percentage to regenerate the index.

Abstract: A stent includes a cylindrical main body contractible and expandable in a circumferential direction, a cover member coated on inner and/or outer circumference of the main body, and an inverse current preventing member for preventing food or fluid from reversely flowing. The inverse current preventing member is disposed in the main body and includes a fixing layer defining a passage having a diameter capable of allowing food and fluid to pass, the fixing layer being fixed in the main body and a valve layer extending from the fixing layer to a distal end of the main body.

Abstract: A medical stent includes a first cylindrical body having a first inner diameter and a central axis, a second cylindrical body connected to one end of the first cylindrical body and having a second inner diameter, and a valve assembly for preventing food or fluid from flowing upstream. The valve assembly includes first, second and third valve members that are extended the central axis to an inner circumference wall of the first cylindrical body and spaced away from each other at an angle of 120° in a circumference direction of the first cylindrical body, the first, second and third valve members being provided with first, second and third passages, respectively, and a supporting valve member for connecting lower ends of the first, second and third valve members to an inner circumference wall of the first cylindrical body.

Abstract: A stent includes a first turn made of a wire having a unit length. The first turn is formed having a plurality of first straight sections connected to each other by a plurality of bending points along a circumferential plane and a plurality of valleys and peaks formed by the bending points. The stent further includes a first intersection turn made of a wire having a unit length, the first intersection turn is formed having a plurality of straight sections intersecting the first straight sections to form a plurality of meshes, the straight sections of the intersection turn formed by a plurality of peaks and valleys.

Abstract: The invention relates to an installation for treating wafers made of materials serving as microelectronics substrates including a tank for containing a treatment bath, a wafer support device capable of receiving at least one wafer of a first size, and an element for grasping and placing each wafer of the first size in the bath and for removing it therefrom. The installation further includes a support for receiving at least one wafer of a second size that is smaller than the first size, the shape of the support allowing it to be grasped by the grasping element and received by the wafer support device in the tank.

Abstract: An integrated multi-channel Fiber Channel analyzer provides coordinated and cooperative triggering and capture of data across multiple channels in a Fiber Channel network. The integrated multi-channel analyzer accommodates up to sixteen separate analyzer channels in a single cabinet. Each analyzer channel is comprised of an input port connection to the Fiber Channel network, a trace buffer memory that captures data and logic circuitry that controls the operation of the trace buffer memory in response to a status condition. A high speed status bus is connected to each analyzer channel and propagates the status conditions of each analyzer channel to all other analyzer channels. In this way, the integrated multi-channel analyzer allows for distributive control over triggering decisions across multiple analyzer channels, and also allows for multi-level triggering where different conditions may be detected by different analyzer channels.

Abstract: A deep trace buffer management system for a protocol analyzer includes a hardware search engine that locates specified data patterns within the trace buffer as directed by a host processor. The protocol analyzer is preferably connected to a laptop computer that serves as the host processor, and the protocol analyzer preferably is housed in a portable chassis separate from the host processor and has a host port to connect to the host processor through a relatively small bandwidth port. An interface port connects the protocol analyzer to the communication interface under analysis. Logic circuitry controls selective read and write operations of traces to and from the trace buffer in response to parameters as directed by the host processor.

Abstract: A belt-type carrier system is described, that comprises a guide rail structure having straight and curved sections. The guide rail structure has at least one track extending therealong. A belt extends along the guide rail structure. A drive device is provided for driving the belt along the guide rail structure. A spring plate is put on and fixed to a part of the belt. A flexible mounting member is mounted on the spring plate. The flexible mounting member is flexed when an external stress is applied thereto. A carrier base structure is provided which has at least one follower that runs on the track of the guide rail structure when the carrier base structure moves along the guide rail structure. A universal joint structure is arranged between the flexible mounting member and the carrier base structure.

Abstract: A deep trace buffer management system for a protocol analyzer includes a hardware search engine that locates specified data patterns within the trace buffer as directed by a host processor. The protocol analyzer is preferably connected to a laptop computer that serves as the host processor, and the protocol analyzer preferably is housed in a portable chassis separate from the host processor and has a host port to connect to the host processor through a relatively small bandwidth port. An interface port connects the protocol analyzer to the communication interface under analysis. Logic circuitry controls selective read and write operations of traces to and from the trace buffer in response to parameters as directed by the host processor.

Abstract: A deep trace buffer management system for a protocol analyzer includes a hardware search engine that locates specified data patterns within the trace buffer as directed by a host processor. The protocol analyzer is preferably connected to a laptop computer that serves as the host processor, and the protocol analyzer preferably is housed in a portable chassis separate from the host processor and has a host port to connect to the host processor through a relatively small bandwidth port. An interface port connects the protocol analyzer to the communication interface under analysis. Logic circuitry controls selective read and write operations of traces to and from the trace buffer in response to parameters as directed by the host processor.

Abstract: In order to connect two tubular guide rails, a connector is used. Each tubular guide rail is formed with an elongate rounded recess which extends perpendicular to the longitudinal axis of the tubular guide rail. A seal member of elastic material is to be put between terminal ends of the two tubular guide rails. A joint plate has two parallel elongate rounded recesses formed therein. The joint plate is connectable to the two tubular guide rails in such a manner that each of the parallel elongate rounded recesses mates with the elongate rounded recess of the corresponding tubular guide rail to define a substantially cylindrical pin receiving space. Two cylindrical positioning pins are employed each being to be received in the substantially cylindrical pin receiving space. A securing device is employed which, when actuated, gradually presses the joint plate against the tubular guide rails and finally secures the joint plate to the tubular guide rails.

Abstract: A universal electrical interface system connects to a small computer system interface (SCSI) bus. In a passive embodiment, a set of single-ended receivers and a set of differential receivers receive electrical signals on the SCSI bus according to the single-ended or differential protocol, respectively, when each set of receivers is enabled. In an active embodiment, a set of single-ended transceivers and a set of differential transceivers transmit and receive electrical signals on the SCSI bus according to the single-ended or differential protocol, respectively, when each set of transceivers is enabled. A control mechanism connected to both sets of receivers or transceivers automatically determines whether the SCSI bus is configured to use either the single-ended or differential parallel interface protocol and selectively enables the set of single ended receivers or transceivers, or the set of differential receivers or transceivers.

Abstract: A universal electrical interface system connects to a small computer system interface (SCSI) bus. In a passive embodiment, a set of single-ended receivers and a set of differential receivers receive electrical signals on the SCSI bus according to the single-ended or differential protocol, respectively, when each set of receivers is enabled. In an active embodiment, a set of single-ended transceivers and a set of differential transceivers transmit and receive electrical signals on the SCSI bus according to the single-ended or differential protocol, respectively, when each set of transceivers is enabled. A control mechanism connected to both sets of receivers or transceivers automatically determines whether the SCSI bus is configured to use either the single-ended or differential parallel interface protocol and selectively enables the set of single ended receivers or transceivers, or the set of differential receivers or transceivers.