Patents Assigned to IBIS INNOTECH INC.
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Patent number: 10256180Abstract: A package structure includes a substrate, an insulator, a plurality of pads and a patterned circuit layer. The substrate includes a plurality of through holes. The insulator covers the substrate and is filled in the through hole. The conductive vias are located in the through holes and penetrate the insulator filled in the through holes. The pads are disposed on an upper surface and a lower surface of the insulator and electrically connected to the conductive vias. A bottom surface of each pad is lower than the top surface of the insulator. The patterned circuit layer is disposed on the top surface of the insulator and connected to the conductive vias and the pads. A bottom surface of the patterned circuit layer is lower than the top surface of the insulator.Type: GrantFiled: March 17, 2017Date of Patent: April 9, 2019Assignee: IBIS Innotech Inc.Inventors: Wen-Chun Liu, Wei-Jen Lai
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Patent number: 10134668Abstract: A package structure includes a lead frame, an insulator, a plurality of conductive vias, a patterned metal layer, and a chip. The lead frame includes a plurality of contacts. The insulator covers the lead frame. The conductive vias are disposed on the insulator and connected to the contacts. The patterned metal layer covers an outer surface of the insulator and includes a groove and a circuit portion. The circuit portion is connected to and covers the conductive vias and contacts. The groove surrounds the circuit portion such that the circuit portion is electrically insulated from the rest of the patterned metal layer. A surface of the insulator exposed by the groove is lower than the outer surface. The chip is disposed on the insulator and electrically connected to the circuit portion.Type: GrantFiled: July 24, 2017Date of Patent: November 20, 2018Assignee: IBIS Innotech Inc.Inventors: Wen-Chun Liu, Wei-Jen Lai
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Publication number: 20180294218Abstract: A package structure includes a lead frame, an insulator, a plurality of conductive vias, a patterned metal layer, and a chip. The lead frame includes a plurality of contacts. The insulator covers the lead frame. The conductive vias are disposed on the insulator and connected to the contacts. The patterned metal layer covers an outer surface of the insulator and includes a groove and a circuit portion. The circuit portion is connected to and covers the conductive vias and contacts. The groove surrounds the circuit portion such that the circuit portion is electrically insulated from the rest of the patterned metal layer. A surface of the insulator exposed by the groove is lower than the outer surface. The chip is disposed on the insulator and electrically connected to the circuit portion.Type: ApplicationFiled: July 24, 2017Publication date: October 11, 2018Applicant: IBIS Innotech Inc.Inventors: Wen-Chun Liu, Wei-Jen Lai
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Patent number: 10090256Abstract: A semiconductor structure includes an insulating layer, a plurality of stepped conductive vias and a patterned circuit layer. The insulating layer includes a top surface and a bottom surface opposite to the top surface. The stepped conductive vias are disposed at the insulating layer to electrically connect the top surface and the bottom surface. Each of the stepped conductive vias includes a head portion and a neck portion connected to the head portion. The head portion is disposed on the top surface, and an upper surface of the head portion is coplanar with the top surface. A minimum diameter of the head portion is greater than a maximum diameter of the neck portion. The patterned circuit layer is disposed on the top surface and electrically connected to the stepped conductive vias.Type: GrantFiled: November 29, 2016Date of Patent: October 2, 2018Assignee: IBIS Innotech Inc.Inventors: Wen-Chun Liu, Wei-Jen Lai
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Patent number: 9859193Abstract: A package structure including a substrate, a first lead frame, a first metal layer, at least one chip, a base and a second metal layer is provided. The base includes a plurality of openings. The first lead frame is embedded in the substrate and includes a plurality of first pads, where the openings expose the first pads. The first metal layer covers the exposed first pads. The chip is disposed on the substrate and electrically connected to the first metal layer and the first pads. The base covers the substrate with its bonding surface. The second metal layer covers a base surface of the base.Type: GrantFiled: May 22, 2017Date of Patent: January 2, 2018Assignee: IBIS Innotech Inc.Inventors: Wen-Chun Liu, Wei-Jen Lai
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Patent number: 9801282Abstract: A package structure includes a substrate, a sensor, a base, a lead frame, conductive vias and patterned circuit layer. The substrate includes a component-disposing region and electrode contacts. The sensor is disposed at the component-disposing region and electrically connected to the electrode contacts. The base covers the substrate with its bonding surface and includes a receiving cavity, a slanted surface extended between a bottom surface of the receiving cavity and the bonding surface, and electrodes disposed on the bonding surface and electrically connected to the electrode contacts respectively. The sensor is located in the receiving cavity. The lead frame is disposed at the base. The conductive vias penetrates the base and electrically connected to the lead frame. The patterned circuit layer is disposed on the slanted surface and electrically connected to the conductive vias and the electrodes.Type: GrantFiled: August 10, 2016Date of Patent: October 24, 2017Assignee: IBIS Innotech Inc.Inventor: Wen-Chun Liu
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Publication number: 20170256479Abstract: A package structure including a substrate, a first lead frame, a first metal layer, at least one chip, a base and a second metal layer is provided. The base includes a plurality of openings. The first lead frame is embedded in the substrate and includes a plurality of first pads, where the openings expose the first pads. The first metal layer covers the exposed first pads. The chip is disposed on the substrate and electrically connected to the first metal layer and the first pads. The base covers the substrate with its bonding surface. The second metal layer covers a base surface of the base.Type: ApplicationFiled: May 22, 2017Publication date: September 7, 2017Applicant: IBIS Innotech Inc.Inventors: Wen-Chun Liu, Wei-Jen Lai
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Publication number: 20170194241Abstract: A package structure includes a substrate, an insulator, a plurality of pads and a patterned circuit layer. The substrate includes a plurality of through holes. The insulator covers the substrate and is filled in the through hole. The conductive vias are located in the through holes and penetrate the insulator filled in the through holes. The pads are disposed on an upper surface and a lower surface of the insulator and electrically connected to the conductive vias. A bottom surface of each pad is lower than the top surface of the insulator. The patterned circuit layer is disposed on the top surface of the insulator and connected to the conductive vias and the pads. A bottom surface of the patterned circuit layer is lower than the top surface of the insulator.Type: ApplicationFiled: March 17, 2017Publication date: July 6, 2017Applicant: IBIS Innotech Inc.Inventors: Wen-Chun Liu, Wei-Jen Lai
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Publication number: 20170077045Abstract: A semiconductor structure includes an insulating layer, a plurality of stepped conductive vias and a patterned circuit layer. The insulating layer includes a top surface and a bottom surface opposite to the top surface. The stepped conductive vias are disposed at the insulating layer to electrically connect the top surface and the bottom surface. Each of the stepped conductive vias includes a head portion and a neck portion connected to the head portion. The head portion is disposed on the top surface, and an upper surface of the head portion is coplanar with the top surface. A minimum diameter of the head portion is greater than a maximum diameter of the neck portion. The patterned circuit layer is disposed on the top surface and electrically connected to the stepped conductive vias.Type: ApplicationFiled: November 29, 2016Publication date: March 16, 2017Applicant: IBIS Innotech Inc.Inventors: Wen-Chun Liu, Wei-Jen Lai
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Publication number: 20160353575Abstract: A package structure includes a substrate, a sensor, a base, a lead frame, conductive vias and patterned circuit layer. The substrate includes a component-disposing region and electrode contacts. The sensor is disposed at the component-disposing region and electrically connected to the electrode contacts. The base covers the substrate with its bonding surface and includes a receiving cavity, a slanted surface extended between a bottom surface of the receiving cavity and the bonding surface, and electrodes disposed on the bonding surface and electrically connected to the electrode contacts respectively. The sensor is located in the receiving cavity. The lead frame is disposed at the base. The conductive vias penetrates the base and electrically connected to the lead frame. The patterned circuit layer is disposed on the slanted surface and electrically connected to the conductive vias and the electrodes.Type: ApplicationFiled: August 10, 2016Publication date: December 1, 2016Applicant: IBIS Innotech Inc.Inventor: Wen-Chun Liu
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Patent number: 9508634Abstract: A package structure includes a lead frame, a selective-electroplating epoxy compound, conductive vias and a patterned circuit layer. The lead frame includes a metal stud array having metal studs. The selective-electroplating epoxy compound covers the metal stud array. The selective-electroplating epoxy compound includes non-conductive metal complex. The conductive vias are directly embedded in the selective electroplating epoxy compound to be respectively connected to the metal studs and extended to a top surface of the selective-electroplating epoxy compound. Each of the conductive vias includes a lower segment connected to the corresponding metal stud and an upper segment connected to the lower segment and extended to the top surface, and a smallest diameter of the upper segment is greater than a largest diameter of the lower segment. The patterned circuit layer is directly disposed on the top surface and electrically connected to the conductive vias.Type: GrantFiled: April 20, 2016Date of Patent: November 29, 2016Assignee: IBIS Innotech Inc.Inventor: Wen-Chun Liu
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Patent number: 9451694Abstract: A package structure includes a selective-electroplating epoxy compound, a first patterned circuit layer, second patterned circuit layers, metal studs, contact pads and conductive vias. The selective-electroplating epoxy compound includes cavities, a first surface and a second surface. The cavities disposed on the first surface in array arrangement. The selective-electroplating epoxy compound is formed by combining non-conductive metal complex. The metal studs are disposed in the cavities respectively and protruded from the first surface. The first patterned circuit layer is directly disposed on the first surface. The selective-electroplating epoxy compound exposes a top surface of the patterned circuit layer. The top surface is lower than or coplanar with the first surface. The second patterned circuit layers are directly disposed on the second surface.Type: GrantFiled: March 19, 2015Date of Patent: September 20, 2016Assignee: IBIS Innotech Inc.Inventors: Chih-Kung Huang, Wei-Jen Lai, Wen-Chun Liu
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Patent number: 8985807Abstract: The invention provides an electrical connector and a backlight module using that electrical connector. The electrical connector includes a body and two conducting lines. The body is provided with first and second connecting portions, the former of which has a first connecting surface and the latter has a second connecting surface. An invariable relative angle is defined between the first and second connecting surfaces. The conducting lines are coated on the first and second connecting surfaces without crossing each other. The backlight module includes a light guide plate, two LED light bars mounted to two respective light receiving edges of the light guide plate, and an aforesaid electrical connector connecting the LED light bars. The electrical connector is electrically connected with the LED light bars and fixes their relative positions. Besides, it is easy to install the electrical connector to connect the LED light bars firmly.Type: GrantFiled: August 15, 2012Date of Patent: March 24, 2015Assignee: IBIS Innotech Inc.Inventors: Chen Hui-Hsiung, Lai Wei-Jen
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Publication number: 20150060929Abstract: A ceramic circuit board includes a substrate made of Al2O3 or AlN and having an exterior surface and a groove recessed from the exterior surface. The groove has a bottom surface provided with a roughness Ra of 1-20 ?m, a plurality of crests and a plurality of troughs. The crests are located in an imaginary plane separated from the exterior surface at a distance of 1-100 ?m. An electro-conductive wire is embedded in the groove and has a top surface flush with the exterior surface. An LED package module includes a ceramic circuit board having two embedded electro-conductive wires, two bonding pads respectively mounted on the top surfaces of the wires, and an LED chip having two contacts electrically connected with the bonding pads respectively. The electro-conductive wire is connected with the substrate firmly and made relatively thicker capable of carrying a relatively larger electric current.Type: ApplicationFiled: February 3, 2014Publication date: March 5, 2015Applicant: IBIS INNOTECH INC.Inventor: Wei-Jen LAI