Abstract: A phase frequency detection circuit and method in a phase lock loop circuit uses delay circuits to limit the period of expression of up and down signals which adjust the output frequency of a voltage controlled oscillator. The pulse frequency detection circuit includes cross-linked latches to drive logic gates which produce output signals for adjusting the output frequency of a voltage controlled oscillator and delay circuitry connected to the outputs of particular logic gates for selective nullification of up and down control signals to a voltage controlled oscillator.

Abstract: An automatic gain control circuit and method ensure feedback for oscillator circuitry fabricated on a single semiconductor chip to adapt to the Q value established by a resonator circuit connected to the oscillator circuitry, and to ensure that gain is maximized and linearity of operation preserved within the voltage rails of the power supply.

Abstract: A voltage controlled oscillator circuit includes a predetermined number of interconnected differential comparator cells having source connected p-channel and n-channel transistors, a biasing transistor connected to the sources of the p-channel or n-channel transistors, and clamping circuits connected to said first and second n-channel transistors. The voltage controlled oscillator circuit further includes filter circuitry for filtering the input currents to the biasing transistor.