Abstract: The present application discloses an apparatus for determining and displaying gear ratios in a transmission system having a driving sprocket set, a driven sprocket set and a flexible drive member that engages the driving sprocket set and driven sprocket set, the apparatus comprising a display, a sensing module, the sensing module comprising a plurality of magneto-resistive assemblies, wherein at least one of the plurality of magneto-resistive assemblies is configured to detect adjustment of the transmission system, the sensing module configured to generate a signal responsive to said adjustment of the transmission system, and a data processor communicatively coupled with the display and with the sensing module, the data processor configured to receive the signal generated by the sensing module, process the signal to generate data relating to sprockets engaged by the flexible drive member, and write the data to the display.

Abstract: The invention provides an infant sleep system that can deter, reduce or eliminate several risk factors affecting infants while sleeping, including, but not limited to SIDS (Sudden Infant Death Syndrome), skull flattening, toxic gas theory, acid reflux or Gastro-Esophageal Reflux (GER), colic, and injuries resulting from falls.

Abstract: A computer system is provided having a register stack engine to manage data transfers between a backing store and a register stack. The computer system includes a processor and a memory coupled to the processor through a memory channel. The processor includes a register stack to store data from one or more procedures in one or more frames, respectively. The register stack engine monitors activity on the memory channel and transfers data between selected frames of the register stack and a backing store in the memory responsive to the available bandwidth on the memory channel.

Abstract: A branch operation is processed using a branch predict instruction and an associated branch instruction. The branch predict instruction indicates a predicted direction, a target address, and an instruction address for the associated branch instruction. When the branch predict instruction is detected, the target address is stored at an entry indicated by the associated branch instruction address and a prefetch request is triggered to the target address. The branch predict instruction may also include hint information for managing the storage and use of the branch prediction information.

Abstract: A method and apparatus to handle exceptions. The method receives and prioritizes exceptions resulting from executing an instruction on different elements of an operand. The exceptions are reported to an interrupt service register which communicates the exceptions to an exception handler to effectively process the exceptions.

Abstract: A computer implemented method in a processor to perform a backing store switch from a first context (source context) to a second context (target context) is provided whereby the backing store memory image and RSE will be synchronized with the processor's execution of instructions. The processor includes a register stack (RS) device that includes a portion allocated for dirty registers. The portion is defined by first and second physical register numbers. The processor further includes a register stack engine (RSE) to exchange information in one of an instruction execution dependent and independent modes between a storage area and the RS. The processor further includes a FLUSHRS state machine to notify the RSE to store dirty register in the RS to a backing store located in a memory.

Abstract: A method for processing one or more branch instructions in an instruction bundle is provided. The instructions are ordered in an execution sequence within the bundle, with the branch instructions ordered last in the sequence. The bundled instructions are transferred to execution units indicated by a template field that is associated with the bundle. The first branch instruction in the bundle's execution sequence that is resolved taken is determined, and retirement of subsequent instructions in the execution sequence is suppressed.

Abstract: A processor that is configured to execute a programmed flow of instructions is disclosed. The processor includes a register stack (RS). The register stack (RS) has a portion allocated for dirty registers. The processor also includes a register stack engine (RSE) to exchange information, in one of an instruction execution dependent and independent modes, between the RS and storage area. The processor also includes a flush control circuit to generate to the RSE, dependent of instruction execution a signal, in response to which, the RSE spills to the storage area all dirty registers, from the RS. A computer implemented method in a processor is also provided. The processor includes a register stack (RS) device that includes a portion allocated for dirty registers. The portion is defined by first and second physical register numbers.

Abstract: A branch prediction instruction is provided that includes hint information for indicating a storage location for associated branch prediction information in a hierarchy of branch prediction storage structures. When the hint information is in a first state, branch prediction information is stored in a first structure that provides single cycle access to the stored information. When the hint information is in a second state, the branch prediction information is stored in a second structure that provides slower access to the stored information.

Abstract: A method for returning from an interrupting context to an interrupted context in a processor is disclosed. The processor executes a programmed flow of instructions. The processor includes a register stack (RS) and a register stack engine (RSE) to exchange information between the RS and the storage area. The method includes the following steps: (a.) A first pointer (PTR) is generated. The pointer (PTR) points to a location in the storage area where dirty registers (previously unsaved) of an interrupted context are stored; (b.) It is determined whether a mathematical relation is valid between the first pointer and the second pointer (BSPLOAD) to a location in the storage area from where the RSE is configured to load dirty register values into the RS; (c) The second pointer is caused to point to a next location in the storage area if the relation is valid; and (d) A register of the RS is loaded with a content of the next location in the storage area until the mathematical relation becomes invalid.

Abstract: A computer implemented method for switching from an interrupted context to an interrupting context in a processor is provided. The processor includes a register stack (RS) that has first and second portions. The processor includes a register stack engine (RSE) that exchanges information, in one of instruction execution dependent and independent modes between the second portion and a storage area. The method includes the following steps: a state of the RSE of the interrupted context is preserved; a COVER instruction is issued; a first (BSPSTORE) pointer is preserved. The first pointer points to a location in the storage area, of the interrupted context, where a next register of the second portion is to be written; first pointer is written with a value corresponding to the interrupting context; and a second pointer (BSP) is preserved. The new first and second pointers in the interrupting context define the storage area of RS values associated with the interrupted context.

Abstract: A computer-implemented method of switching contexts in a processor is provided. The processor includes a register stack (RS) that has first and second portions. The processor includes a register stack engine (RSE) to exchange information, in one of instruction execution dependent and independent modes between the second portion and the storage area. The computer implemented method of switching contexts includes the following steps: It is determined whether an interrupt occurred; a first register (IFM) configured to store a content of a second register (CFM) is invalidated, the CFM is configured to store control information related to the first portion; it is determined whether an interrupt handler needs to access the RS; and if so, the IFM is validated, the content of the CFM is copied to the IFM, and RSE is caused to exchange information between both the first and second portions of the RS and the storage area.

Abstract: A method and apparatus for handling branch instructions contained within a source program includes applying a set of heuristics to classify each of the branch instructions in the source program as either a hard-to-predict type or a simple type of branch. A system implements a multi-heuristic branch predictor comprising a large, relatively simple branch predictor having many entries, to accommodate the majority of branch instructions encountered in a program, and a second, relatively small, sophisticated branch predictor having a few entries. The sophisticated branch predictor predicts the target addresses of the hard-to-predict branches. By mapping hard-to-predict branches to the sophisticated branch predictor, and easy-to-predict branches to the relatively simple branch predictor, overall performance is enhanced.

Abstract: The present invention provides a method and apparatus for restoring a predicate register set. One embodiment of the invention includes decoding a first instruction which specifies a restoring operation to be performed on a predicate register set. In response to the first instruction, a mask is used to select a plurality of the predicate registers that are to be restored. The mask of the present invention consists of a first set of bits, with each bit of the first set of bits corresponding to a register in the predicate register set. When a bit of the first set of bits is set to one, the predicate register corresponding to that bit is restored. In one embodiment, the mask further includes one bit corresponding to a plurality of registers in the predicate register set, wherein when that bit is set to one, the plurality of registers corresponding to that bit are restored.

Abstract: A baseball pitcher game and training apparatus includes a free swinging target receptacle which is positioned at one end of an elongate enclosure with a player's station positioned at the opposite end of the enclosure. A target is removably positioned in the target receptacle, with the target including a target image printed thereon. An X-Y grid of conductive lines scanned by a target processor determines the position at which a thrown ball impacts the target and the direction and magnitude of spin of the ball. A radar gun positioned in the elongate enclosure has a beam directed across the flight path of the ball to determine the speed of the thrown ball. A game computer is programmed for a game strategy and methodology which rewards throwing speed and accuracy and includes an interactive voice module for verbal feedback to the player. An improved ball return mechanism permits balls to be selectively and reliably returned and dispensed to a player.

Abstract: A protective cover for electrical wall outlets wherein a rectangular face plate is detachably mounted to the wall, over an electrical wall plug outlet, for receiving a generally rectangular shaped box-like cover having one open end, in locking engagement, to prevent access to or the touching of exposed electrical plug prongs. An upstanding flange or border is provided on all four sides of the face plate and a flange receiving cavity is formed between the face plate and flange or border at its lower and upper ends for receiving mating flanges on the upper and lower ends of the box-like cover. Flanges are also provided on the exterior of the vertical sides of the box-like cover for sliding over the vertical sides of the upstanding flange of the face plate when the two members are coupled to provide further locking engagement.

Abstract: An electrical wall plug outlet enclosure and safety device wherein a face plate is detachably mounted to the wall over the electrical wall plug outlet and in turn a generally rectangular but tapered cover is detachably mounted to the face plate to prevent touching of an inserted electrical plug and to prevent the insertion of an object, especially a metal object, into the electrical outlet when a plug is not inserted. The cover further has openings at one end for passage of an electrical cord or cords attached at one end to an electrical plug and at its other end to an electrical appliance. The face plate has slots formed in or near its vertical edges for engagement with flanges formed on opposite sides of the box-like cover to detachably secure the box-like cover to the face plate.

Abstract: A sliding gate type outlet port for a semi-liquid manure spreader is presented. The spreader with which the gate is used has an open topped tank of triangular cross section supported on a tractor drawn trailer. The power takeoff from the tractor is coupled to a shaft extending internally the length of the tank near the bottom. At the rear wall of the tank the shaft is coupled to a centrifugal pump which communicates with the tank and flings manure received therefrom in an arc away from a discharge opening in the pump housing. A hydraulically actuated flow regulating gate slides fore and aft across the pump exit port. The horizontal movement of the gate in a support structure allows an opening of constant height to be maintained while varying the area of the discharge opening, thus providing constant spread width under various settings of deposition density.

Abstract: A spreader implement and drive gearbox therefor are provided that incorporate a single gearbox for driving both a distributor assembly for throwing manure and the like out of the spreader implement and for driving a transporting assembly for moving the manure or the like toward the distributor assembly. The single gearbox provides direct gear drive of one of the assemblies. The drive gearbox may include one or more biased clutch assemblies for clutching or varying the driving speed transmitted by the gearbox.