Patents Assigned to ILC Data Device Corporation
  • Patent number: 6119333
    Abstract: A power module with leads extending upwardly. The circuit components and connections of the power module are arranged upon a substrate having interface leads attached thereto extending away from the undersurface of the substrate. The interface leads extend through openings in a form fitting molded case. The case has an open center region to facilitate performance of final assembly steps upon the module and is subsequently covered with a rugged lid and is encapsulated with a suitable potting material. The interior of the module is filled with a gel to provide moisture-proof protection.
    Type: Grant
    Filed: May 20, 1998
    Date of Patent: September 19, 2000
    Assignee: ILC Data Device Corporation
    Inventor: Len Marro
  • Patent number: 5901044
    Abstract: A power module with leads extending upwardly. The circuit components and connections of the power module are arranged upon a substrate having interface leads attached thereto extending away from the undersurface of the substrate. The interface leads extend through openings in a form fitting molded case. The case has an open center region to facilitate performance of final assembly steps upon the module and is subsequently covered with a rugged lid and is encapsulated with a suitable potting material. The interior of the module is filled with a gel to provide moisture-proof protection.
    Type: Grant
    Filed: July 10, 1997
    Date of Patent: May 4, 1999
    Assignee: ILC Data Device Corporation
    Inventor: Len Marro
  • Patent number: 5737165
    Abstract: Apparatus for replacing conventional fault isolation resistors includes a terminal coupled to one winding of a transformer whose other winding is coupled across the two-line databus. Enhancement-mode-field-effect transistors have their source and drain electrodes each coupled between one end of the other winding and one of the databus lines and their control electrodes coupled at spaced intervals along the other winding. The winding voltage is zero when a terminal is not transmitting, turning off the field-effect transistors, presenting an open circuit. The parasitic body diodes of the transistors are connected in series and are poled to oppose each other to prevent conduction of signals from the databus. Thus, signals on the databus are not loaded by the terminal's output impedance. When winding voltage exceeds a threshold, one transistor conducts, providing substantially a short-circuit. The parasitic body diode of the remaining transistor also conducts.
    Type: Grant
    Filed: February 8, 1996
    Date of Patent: April 7, 1998
    Assignee: ILC Data Device Corporation
    Inventor: Barry E. Becker
  • Patent number: 5526288
    Abstract: An integrated circuit device for comparing the state of a large number of inputs (i.e. "discretes") against any one of a plurality of selectable voltage levels. The compared data is examined in a 3.times.3 matrix format. In a redundant mode, comparators are utilized in a triple-redundant configuration to obtain a consensus on input states, at three successive time intervals, raising a flag when consensus fails. Inputs, whether in a redundant or non-redundant mode are distributed along three different sides of a rectangular-shaped substrate to prevent catastrophic mechanical failures. In the redundant mode, discretes are compared using a voting technique such that when all three levels are the same, an error free status is provided, whereas a two-out-of-three vote is interpreted as correct but with an indication that the discrete being monitored requires further checking.
    Type: Grant
    Filed: November 5, 1993
    Date of Patent: June 11, 1996
    Assignee: ILC Data Device Corporation
    Inventors: Stephen Sacks, Cliff Weber, Barry E. Becker
  • Patent number: 4417352
    Abstract: Apparatus for imparting a delay to an input signal utilizing counter means comprised of a plurality of binary coded decimal counter stages connected in cascade. The high frequency input signal applied to the counter undergoes a divide-by 10.sup.N operation wherein N equals the number of binary coded decimal stages. Preferably, the least significant stage is adapted to be selectively and periodically preset to a binary coded decimal value different from its normal reset state to either increase or reduce the number of pulses required to cause the counter stage to read a terminal count to selectively either advance or retard the phase of the reduced frequency output signal developed at the output of the counter relative to the phase of the input signal applied to the counter in accordance with a preprogrammed value set into said counter stage.
    Type: Grant
    Filed: May 5, 1980
    Date of Patent: November 22, 1983
    Assignee: ILC Data Device Corporation
    Inventor: Leonard F. Shepard
  • Patent number: 4389669
    Abstract: An opto-video inspection system for inspecting and examining miniaturized solid-state devices, such as hybrids. An XY table simultaneously positions a known good device and a device to be inspected under respective stereo-zoom microscopes. A TV camera is coupled to each microscope. The XY table, under microprocessor control, is manipulated to select the "target" or wire bond to be viewed. The selected sites may be simultaneously viewed upon a split screen video display or, alternatively, either the known good device or the device being inspected may be separately viewed through the associated stereo-zoom microscope or on the video screen. Dwell time at each site is computer selectable, as is the sequencing of sites to be viewed. Defective bonds, imperfections or other conditions are permanently recorded through a printer which automatically associates the code printed thereby with the site in view at that time.
    Type: Grant
    Filed: February 27, 1981
    Date of Patent: June 21, 1983
    Assignee: ILC Data Device Corporation
    Inventors: Daniel Epstein, Robert Lieberman
  • Patent number: 4366469
    Abstract: A companding analog to digital converter for converting an analog signal into a variable length multi-bit binary word, the number of said bits being a function of the magnitude of the analog signal being converted relative to the high end of the range of magnitudes capable of being converted. The analog signal is temporarily stored and is attenuated by a predetermined amount. The attenuated signal is converted into a multi-bit digital word. A group of the most significant bits of said digital word are examined to alter the attenuation of the stored analog signal dependent upon its magnitude relative to the full scale. The attenuated analog signal is again converted into a multi-bit digital word which is temporarily stored. The group of binary bits initially stored together with results of the second conversion operation are combined to develop a multi-bit digital word whose bit length is a function of the magnitude of the stored analog signal relative to scale.
    Type: Grant
    Filed: September 22, 1980
    Date of Patent: December 28, 1982
    Assignee: ILC Data Device Corporation
    Inventors: Stuart R. Michaels, Stephen J. Sacks
  • Patent number: 4358741
    Abstract: A digital time phase shifter for shifting a signal in very precise increments and which performs the steps of: mixing a reference frequency signal with the signal to be time or phase delayed for generating an intermediate frequency signal; selectively delaying (i.e. advancing or retarding) the intermediate frequency signal; and mixing the delayed intermediate frequency signal and reference signal developing an output signal whose frequency is an integer multiple or sub-multiple of the input signal frequency and whose phase delay is proportional to the ratio of the intermediate signal and input signal frequencies. Small delay increments are obtained by judicious selection of the reference frequency. The output frequency may be slowly delayed relative to the input frequency by repeating the delay step. The phase shifter employs a pair of phase-locked loops, digital mixing circuits and a programmable delay generator.
    Type: Grant
    Filed: September 17, 1979
    Date of Patent: November 9, 1982
    Assignee: ILC Data Device Corporation
    Inventor: Roy Nardin
  • Patent number: 4208698
    Abstract: A hybrid solid state package in which integrated circuits, precision resistor networks, capacitors and their interconnections are accommodated on a multi-layer process substrate while thick film resistors and interconnections provided on a separate substrate, which sub-assemblies are then sandwiched together using film epoxies are inserted within a single package, to thereby yield a structure of significantly smaller size and lighter weight and having minimal number of input-output interconnections as compared with conventional designs and without impairing quality or reliability.
    Type: Grant
    Filed: October 26, 1977
    Date of Patent: June 17, 1980
    Assignee: ILC Data Device Corporation
    Inventor: Tanjore R. Narasimhan
  • Patent number: 4156794
    Abstract: A louvred handle assembly for equipment racks of the removable type in which louvred elements of the handle assembly cooperate with elongated slots provided in the panel of the equipment rack to permit the flow of air therethrough, especially for cooling purposes, while at the same time preventing ingress of rain or moisture due to the orientation of the louvres and also to prevent ingress of any foreign matter such as stones or small debris. The handle itself may serve as a radiation means to conduct heat away from the equipment rack and into the atmosphere.
    Type: Grant
    Filed: August 25, 1977
    Date of Patent: May 29, 1979
    Assignee: ILC Data Device Corporation
    Inventor: James Robinson
  • Patent number: 4130875
    Abstract: In a digital-to-resolver type converter for generating sine and cosine functions over at least a predetermined angular range wherein variation of the scale factor from absolute value is remarkably improved by modification of the reference input wherein the sum of the sine and cosine signals are fed back in a positive sense, providing more than a 30 fold improvement in reduction of scale factor variation in one preferred embodiment.
    Type: Grant
    Filed: March 4, 1977
    Date of Patent: December 19, 1978
    Assignee: ILC Data Device Corporation
    Inventor: Seymour Lanton
  • Patent number: 4119959
    Abstract: A function generator for use in a synchro to digital (S to D) converter in which successive approximations of the digital output are made by switching between two chains of cascade connected operational amplifiers so that, as one chain is incremented to decrease the error signal appearing at the output of the chain, the other chain is coupled to control the error reduction operation until the aforementioned switching is completed, at which time the chains reverse roles.
    Type: Grant
    Filed: September 14, 1976
    Date of Patent: October 10, 1978
    Assignee: ILC Data Device Corporation
    Inventor: Seymour Lanton
  • Patent number: 4035833
    Abstract: Method and apparatus for comparing and/or adjusting the frequency output of a frequency source, which method and apparatus is greatly simplified, and permits adjustment within a relatively short time interval and at a precision whose known difference is less than five parts in the 10.sup.12.The rubidium-controlled oscillator employed by the major networks to produce the 3.58 MHz subcarrier signal is utilized as a standard. Offsets made available at regular intervals by the National Bureau of Standards are utilized to indicate the frequency differences between the network standards and the United States Frequency Standard (USFS).
    Type: Grant
    Filed: December 1, 1975
    Date of Patent: July 12, 1977
    Assignee: ILC Data Device Corporation
    Inventor: Leonard F. Shepard
  • Patent number: D255433
    Type: Grant
    Filed: December 12, 1977
    Date of Patent: June 17, 1980
    Assignee: ILC Data Device Corporation
    Inventors: Jack G. Anderson, Thomas V. Guerriere