Abstract: An active stylus includes a memory; a transmission module; and an active stylus controller, coupled to the memory and the transmission module. The active stylus controller controls the transmission module to periodically transmit a downlink beacon signal and a plurality of downlink signals so as to synchronize timing with a touch panel and transmit information. The downlink beacon signal is composed of a plurality of bit data and includes a preamble, stored in the memory, for synchronizing the timing; a digital data, for transmitting information from the active stylus to the touch panel; and a cyclic redundancy check, for executing an error check or an error correction for data. The touch panel is an in-cell/on-cell organic light-emitting diode (OLED) touch screen or an in-cell/on-cell liquid-crystal display (LCD) touch screen.

Abstract: A touch input system includes a touch panel, configured to transmit an uplink signal; and an active stylus, configured to analyze the uplink signal, synchronize timing and bi-directionally communicate with the touch panel according to the uplink signal; wherein the uplink signal includes a preamble, for synchronizing the timing; a digital data, for bi-directionally communicating between the active stylus and the touch panel; and a cyclic redundancy check, for executing an error check and an error correction for data.

Abstract: A touch input system includes a touch panel, configured to transmit an uplink signal; and an active stylus, configured to analyze the uplink signal, synchronize timing and bi-directionally communicate with the touch panel according to the uplink signal; wherein the uplink signal includes a preamble, for synchronizing the timing; a digital data, for bi-directionally communicating between the active stylus and the touch panel; and a cyclic redundancy check, for executing an error check and an error correction for data.

Abstract: A touch panel is provided and includes a plurality of electrode strip sets, a plurality of transparent traces and a plurality of electrode series sets. The electrode strip sets include a first electrode strip set and a second electrode strip, and the first electrode strip set is disposed between the second electrode strip and a pad region. The transparent traces are disposed in a light-transmitting region, the transparent traces electrically connected to the first electrode strip set and the second electrode strip set include a winding segment respectively, and a length of the winding segment electrically connected to the first electrode strip set is longer than a length of the winding segment electrically connected to the second electrode strip set. The electrode series sets cross the electrode strip sets.

Abstract: A current-to-voltage converter which is used to receive an input current and to generate an output voltage accordingly comprises a current tracking bias circuit, a current-to-voltage unit, and a voltage clamp bias circuit. The current tracking bias circuit generates a first bias according to the input current. The current-to-voltage unit receives the first bias and the input current, and generates the output voltage according to the input current, wherein the first bias determines a range of the input current, the current-to-voltage unit has a first current control device, and the first current control device changes a current conduction level thereof in response to the first bias, such that a rising or falling speed of the output voltage is enhanced. The voltage clamp bias circuit clamps voltage levels of two ends where the voltage clamp bias circuit is connected to the current-to-voltage unit.

Abstract: A method for backlight control includes: receiving a display synchronization signal; generating a backlight control signal according to the display synchronization signal; and driving a backlight source according to the backlight control signal. An apparatus for backlight control includes: a signal receiving circuit, for receiving a display synchronization signal; a control circuit, coupled to the signal receiving circuit, for generating a backlight control signal according to the display synchronization signal; and a driving circuit, coupled to the control circuit, for driving a backlight source according to the backlight control signal.

Abstract: A voltage multiplying circuit comprising: a first capacitor, comprising a first terminal and a second terminal, wherein the first terminal of the first capacitor is selectively coupled to a first voltage or a second voltage, and the second terminal is selectively coupled to the first voltage or a fourth voltage; a second capacitor, comprising a first terminal and a second terminal, wherein the first terminal of the second capacitor is selectively coupled to the second voltage or the fourth voltage, and the second terminal of the second capacitor is selectively coupled to a third voltage or the fourth voltage; and a third capacitor, comprising a first terminal and a second terminal, wherein the first terminal of the third capacitor is selectively coupled to the second voltage or the fourth voltage, and the second terminal of the third capacitor is selectively coupled to a third voltage or the fourth voltage.

Abstract: The present invention provides a data accessing system and a data accessing method. The method comprises: separately storing a (N×M)-bit digital data in L banks of a data storage module; utilizing a register module of a data accessing interface module to transmit data of a bank for L times in sequence, and to receive and latch the digital data included by a bank from the data storage module when transmitting data each time, until the (N×M)-bit digital data is totally latched in the register module; and utilizing a multiplex output module of the data accessing interface module to continuously select a M-bit digital data from the (N×M)-bit digital data registered in the register module, and input the M-bit digital data to a data retrieving device via M data transmission lines.

Abstract: A capacitance difference detecting circuit includes a control circuit, for generating a control signal according to a first voltage and a second voltage; a first capacitor to be detected; a second capacitor to be detected; a first constant capacitor, having a terminal coupled to the first terminal of the first capacitor to be detected and the first input terminal; a second constant capacitor, having a terminal coupled to the first terminal of the second capacitor to be detected and the second input terminal; a voltage control unit, cooperating with the first capacitor to be detected, the second capacitor to be detected, the first constant capacitor and the second constant capacitor to control the first voltage and the second voltage. The voltage control unit is an adjustable capacitor and a capacitance value of the adjustable capacitor is controlled by the control signal.

Abstract: A memory access control apparatus includes a plurality of memory access request generating modules and an arbitrator. When one of the memory access request generating modules receives a second memory access event while a memory device is performing a first memory access operation according to a first memory access request in response to a first memory access event, the memory access request generating module outputs a second memory access request corresponding to the second memory access event to the memory device after a delay time. The arbitrator is implemented for arbitrating memory access requests respectively outputted from the memory accessing request generating modules.

Abstract: A semiconductor device of the present invention comprises: a P type semiconductor substrate, an N-well, a first P+ diffusion region, a second P+ diffusion region, a Schottky diode, a first N+ diffusion region, a second N+ diffusion region, a third P+ diffusion region, a fourth P+ diffusion region, a first insulation layer, a second insulation layer, a first parasitic bipolar junction transistor (BJT), and a second parasitic BJT. The Schottky diode is coupled to an input signal. The first N+ diffusion region and the second N+ diffusion region are coupled to a voltage source, respectively. When a voltage level of the input signal is higher than a voltage level of the voltage source, the Schottky diode conducts charges to make the first parasitic BJT and the second parasitic BJT not conducted.

Abstract: A comparator module applied to a voltage level clamping circuit which can be implemented in an integrated circuit (IC) is provided. The IC includes a parasitic diode coupled between a first voltage source and a second voltage source. The voltage level clamping circuit includes a switch module and a comparator module. The comparator module has an output terminal, a first input terminal coupled to a first voltage source, and a second input terminal coupled to a second voltage source. The comparator module includes a current source module, a first voltage level adjusting circuit module, a second voltage level adjusting circuit module, and a comparing circuit module.

Abstract: The present invention provides a level shift circuit capable of operating at low input voltage. The level shift circuit comprises: a first switch element coupled to a first output terminal, a second switch element coupled to a second output terminal, a third switch element coupled to the second output terminal and the first output terminal, a fourth switch element coupled to the first output terminal and the second output terminal, a first current source module for letting a current passing through the third switch element smaller than a current passing through the first switch element when the first switch element and the third switch element are conducted, and a second current source module for let a current passing through the fourth switch element smaller than a current passing through the second switch element when the second switch element and the fourth switch element are conducted.

Abstract: A signal level shifting circuit, including an input stage circuit and an output signal latching circuit. The input stage circuit receives an input signal, wherein a voltage level of the input signal falls within a first predetermined voltage range. The output signal latching circuit is cascoded with the input stage circuit, and includes: a latching circuit for generating an output signal according to the input signal, wherein a voltage level of the output signal falls within a second predetermined voltage range, and the second predetermined voltage range is different from the first predetermined voltage range; and an activating circuit, coupled to the latching circuit, for selectively enabling or disabling the latching circuit, wherein when a level transition appears to the input signal, the activating circuit disables the latching circuit.

Abstract: A voltage level clamping circuit which can be implemented in an integrated circuit (IC) and a high-speed comparator module, wherein the IC includes a parasitic diode coupled between a first voltage source and a second voltage source. The voltage level clamping circuit includes a switch module coupled between the first voltage source and the second voltage source and a comparator module having an output terminal coupled to the switch module, a first input terminal coupled to the first voltage source, and a second input terminal coupled to the second voltage source, for comparing a voltage level of the first voltage source with a voltage level of the second voltage source to generate an output signal, and transmitting the output signal to the switch module to control a conducting state of the switch module to selectively clamp the voltage level of the second voltage source.

Abstract: The present invention discloses a voltage level generating device. The voltage level generating device includes: a reference voltage generating module, a first circuit module, a second circuit module, and a switch module. The voltage level generating device disclosed in the present invention only requires a buffer, a voltage regulator, and a arithmetic logic unit (ALU) to attain the same function of the conventional common voltage level generating device, and thus the circuit layout area can be reduced so as to decrease the cost of the integrated circuit (IC). In addition, the voltage level generating device disclosed in the present invention also can select different output of voltage level in order to reduce the power consumption of a display device.

Abstract: The present invention relates to an oscillating apparatus. The oscillating apparatus includes a biasing circuit, a multi-vibrator, a detecting circuit, and a selecting circuit. The biasing circuit is for generating a bias signal, wherein the biasing circuit includes a connecting port for using an impedance device to control an oscillating frequency or for directly connecting to external clock source as a reference clock. The multi-vibrator coupled to the biasing circuit for generating the oscillating frequency according to the quantity of the biasing signal. The detecting circuit coupled to the connecting port for generating a detecting signal whether the connecting port is coupled to the impedance device or the external clock source. The selecting circuit includes an AND gate coupled to the multi-vibrator and the selection signal and an OR gate coupled to the AND gate and the connecting port.

Abstract: The present invention discloses a multi-function circuit module having voltage level shifting function and data latching function via switching a plurality of switch elements. The multi-function circuit module includes a first circuit module, a fourth switch element, and a fifth switch module, wherein the first circuit module further includes a first switch module, a second switch module, and a third switch module. The multi-function circuit module can substantially reduce the circuit layout area. For example, when the multi-function circuit module of the present invention is applied in a source driving chip circuit, the multi-function circuit module can replace the original low-to-high voltage level shifting circuit and data latching circuit, so as to attain the purpose of reducing the chip area.

Abstract: The present invention discloses a voltage adjusting circuit including a first switch element, a second switch element, a third switch element, a fourth switch element, a fifth switch element, and a sixth switch element. At first, the voltage adjusting circuit performs a discharging operation on an output voltage toward a reference voltage source, and then when the output voltage level is approaching a voltage level of an input voltage source, the voltage adjusting circuit will perform the discharging operation on the output voltage toward the input voltage source instead, and thus the voltage adjusting circuit can avoid affecting the input voltage source when performing the discharging operation. In addition, the voltage adjusting circuit does not need a digital counter to perform the above dual-phase type discharging operation or multi-phase type discharging operation, and therefore cost of the voltage adjusting circuit is lower, and the voltage adjusting circuit has good accuracy.

Abstract: An amplifying circuit includes an operational amplifier, a pull-up circuit and a pull-down circuit. The operational amplifier generates a first pull-up signal, a first pull-down signal and an output signal, wherein the phases of the first pull-up signal and the first pull-down signal are out of phase with the output signal. The pull-up circuit includes a first controlling module for outputting a second pull-up signal according to the first pull-up signal, and a first adjusting module for adjusting the output signal according to the second pull-up signal. The pull-down circuit includes a second controlling module for outputting a second pull-down signal according to the first pull-down signal, and a second adjusting module for adjusting the output signal according to the second pull-down signal.