Patents Assigned to Imperas Software Ltd.
  • Publication number: 20130173887
    Abstract: In a method of simulating a processor system by running code that simulates the system on a host processor, code is translated at run time to a form required by the host processor. All instructions are mapped to a native instruction set of the host using two or more different code dictionaries: the translated instructions are mapped to multiple and different dictionaries dependent on the execution privilege level or mode of the simulated processor. If an instruction is encountered during runtime that changes the mode of the processor the code dictionary is switched to use the dictionary associated with the new mode. The different modes require different instruction mappings to the native instruction set of the host using different models that more accurately represent the behaviour of the system code and hardware in the system being simulated.
    Type: Application
    Filed: February 19, 2013
    Publication date: July 4, 2013
    Applicant: Imperas Software Ltd.
    Inventor: Imperas Software Ltd.
  • Patent number: 8417508
    Abstract: In a method of simulating a multi-processor system by running code that simulates the system on a host processor, a SPECULATE and a COMMIT instruction is used to mark an area of memory, shared across several simulated processors, and the code is translated at run time to a form required by the host processor. All instructions are mapped to a native instruction set of the host using two different code dictionaries: all instructions outside a SPECULATE/COMMIT region are mapped to the first of the two code dictionaries. If a SPECULATE instruction is encountered during runtime by a simulator running the code, the instructions are mapped to a native instruction set of the host using the second code dictionary.
    Type: Grant
    Filed: July 6, 2007
    Date of Patent: April 9, 2013
    Assignee: Imperas Software Ltd.
    Inventors: James Kenney, Simon Davidmann