Abstract: The present invention provides a method for accessing a flash memory module, wherein the method comprises: receiving data and a corresponding metadata from a host device; performing a CRC operation upon the data to generate a CRC code; encoding the metadata and the CRC code to generate an adjusted parity code; encoding the data and the adjusted parity code to generate encoded data, wherein the encoded data comprises the data, the adjusted parity code and an error correction code corresponding to the data and the adjusted parity code; and writing the encoded data and the metadata to a page of a block of a flash memory module.

Abstract: A collapsible child's stroller with a handle frame (30), a front wheel frame (10) and a rear wheel frame (20), mutually connected at a hinge joint (12, 22, 42) for mutual angular displacement between folded and unfolded configurations. The hinge joint has two spaced apart, parallel hinge axes, about which the frames (10, 20, 30) mutually rotate. The stroller is further provided with a locking element (43, 44) moveable between a locked position in which the frames (10, 20, 30) are locked in the unfolded configuration, and an unlocked position allowing the frames (10, 20, 30) to rotate to the folded configuration. The locking element (43, 44) moves in a direction traverse to the parallel hinge axes to better transfer loads between the frames.

Abstract: The present invention provides a memory controller configured to access a plurality of channels, wherein each of the channels includes a plurality flash memory chips, and the memory controller includes a flash translation layer and a plurality of control modules. The flash translation layer is configured to generate commands with corresponding physical addresses of at least one of the channels. The plurality of control modules are connected to the plurality of channels, respectively, and each of the control modules operates independently to receive the corresponding command with the corresponding physical address from the flash translation layer, to access the flash memory chips within the corresponding channels.

Abstract: The present invention provides a chip comprising a circuit module, a power switch and a detection and control circuit. The power switch is coupled between a supply voltage and the circuit module, and is used to selectively connect the supply voltage to the circuit module, and control a current amount flowing into the circuit module according to at least a control signal. The detection and control circuit is coupled to the power switch, and is used to detect a first signal generated by a first circuit positioned surrounding the circuit module, and compare the first signal with a second signal in a real-time manner to generate the control signal to adjust the current amount flowing into the circuit module.

Abstract: A control method of a flash memory controller, wherein the control method includes the steps of: when data is written to a page of any block of a flash memory module, recording a write time in the page; create a write time table, wherein the write time table records block numbers of blocks having data written therein and corresponding write time; compress the write time table to generate a compressed write time table, wherein the compressed write time table contains multiple time ranges and corresponding indexes, each index corresponds to a page of the flash memory module, and the page records block numbers of all blocks whose writing time is within the corresponding time range.

Abstract: An electromagnetic flowmeter assembly is provided. The assembly includes a magnetic flowmeter configured to couple to a process pipe at a coupling point and measure a flowrate of a flow of process fluid. The assembly includes a conductive polymer reference connection configured to contact the process fluid and provide an electrical connection to magnetic flowmeter electronics.

Abstract: A control system for underwater diving lights utilizes sounds of specific frequency emitted by action of a diver to control one or more remotely positioned diving lights.

Abstract: The present invention provides a SoC including a first CPU, a first tightly-coupled memory, a second CPU and a second tightly-coupled memory is disclosed. The first CPU includes a first core circuit, a first level one memory interface and a first level two memory interface. The first tightly-coupled memory is directly coupled to the first level one memory interface, and the first tightly-coupled memory includes a first mailbox. The second CPU includes a second core circuit, a second level one memory interface and a second level two memory interface. The second tightly-coupled memory is directly coupled to the second level one memory interface, and the second tightly-coupled memory includes a second mailbox. When the first CPU sends a command to the second mailbox within the second tightly-coupled memory, the second core circuit directly reads the command from the second mailbox, without going through the second level two memory interface.

Abstract: The present invention provides an encoder built-in self-test (BIST) circuit applied in a flash memory controller, wherein the encoder BIST circuit includes a control circuit and an encoder. In operations of the encoder BIST circuit, without accessing any flash memory, the control circuit generates input data to the encoder, and the encoder encodes the input data to generate a check code to the control circuit, wherein the check code is arranged to determine whether functions of the encoder fail or not.

Abstract: The invention introduces a method for performing operations to namespaces of a flash memory device, by a processing unit of a storage device, at least including the steps: receiving a cross-namespace data-movement command from a host, requesting to move user data of a first logical address of a first namespace to a second logical address of a second namespace; cutting first physical address information corresponding to the first logical address of a first logical-physical mapping table corresponding to the first namespace; and storing the first physical address information in an entry corresponding to a second logical address of a second logical-physical mapping table corresponding to the second namespace.

Abstract: A method for performing dynamic throttling control with aid of configuration setting and associated apparatus such as a host device, a data storage device and a controller thereof are provided. The method includes: utilizing the host device to provide a user interface, to allow a user to select any of a plurality of throttling control configurations of the data storage device; and in response to the selection of said any of the plurality of throttling control configurations by the user, utilizing the host device to send throttling control information corresponding to said any of the plurality of throttling control configurations toward the data storage device, to perform the dynamic throttling control on the data storage device during programming the NV memory, for limiting power consumption of the data storage device during programming the NV memory, wherein the throttling control information indicates performing the dynamic throttling control is required.

Abstract: An efficient control technology for non-volatile memory. In a controller, a host bridge controller and a master computing unit are coupled to a system memory via an interconnect bus, and then coupled to a non-volatile memory interface controller. In response to a read command issued by a host, the non-volatile memory interface controller temporarily stores data read from a non-volatile memory to the system memory and, accordingly, asserts a flag in the system memory. Through a first channel provided by the interconnect bus, the host bridge controller confirms that the flag is asserted to correctly read the data from system memory and returns the data to the host. The master computing unit reads the system memory through a second channel provided by the interconnect bus, without being delayed by the status checking of the flag.

Abstract: A data storage device including a non-volatile memory and a micro-controller is provided. The non-volatile memory stores a firmware file. The micro-controller is coupled to the non-volatile memory, and performs an encryption procedure on the firmware file. The encryption procedure includes: using a first key and a first algorithm to encrypt the firmware file to generate a signature, using the first key and a second algorithm to scramble the signature to generate a scrambled signature, and attaching the scrambled signature to the firmware file.

Abstract: A method for performing storage control in a storage server may include: regarding any memory device of a plurality of memory devices installed at the storage server, assigning a channel of multiple channels within the memory device for access control corresponding to a thread of a plurality of threads running on the storage server, wherein the storage server configures the plurality of memory devices to form a RAID of the storage server; and during storing a series of logical access units (LAUs) into the RAID, writing information into respective sets of pages of the plurality of memory devices as pages in a LAU of the series of LAUs according to a predetermined arrangement rule, to make the respective sets of pages be sequentially written into the plurality of memory devices respectively with aid of the assignment of the channel of the multiple channels to the thread. Associated apparatus are provided.

Abstract: The present invention provides a control method of a server, wherein the control method includes the steps of: setting a first node within the server as a master device; setting a second node within the server as a slave device; controlling the first node to receive data from another device via network; storing the data into a first write buffer within the first node; performing a cache mirroring operation to copy the data stored in the first write buffer into a second write buffer within the second node; setting a first tail register and a first head register within the first node, and setting a second tail register and a second head register within the second node; and referring to the first tail register and the first head register to determine if the data stored in the first write buffer is successful written into the second write buffer.

Abstract: A data storage device utilized for accessing boot data includes a flash memory, a controller and a RAM. The flash memory includes several blocks, and each block includes several pages. The controller is coupled to the flash memory and the RAM. The controller receives a write command from a host and determines whether the data of the write command is system data or normal data. If the data to be written is system data, the controller transmits a confirm message to the host after the system data has been completely stored on the data storage device.

Abstract: A flow tube liner for a flow tube assembly of a magnetic flowmeter includes a cylindrical wall. The cylindrical wall includes an electrically insulative interior layer and a metallic exterior layer. The exterior layer is bonded to an exterior surface of the interior layer.

Abstract: The invention relates to a method, an apparatus and a computer program product for reading data from multiple flash dies. The method is performed by a processing unit when loading and executing program code to include: issuing a read instruction to a flash interface to drive the flash interface to activate a data read operation for reading data from a location in a die; calculating an output time point corresponding to the read instruction; and issuing a random out instruction corresponding to the read instruction to the flash interface to drive the flash interface to store the data in a random access memory (RAM) when a current time reaches to, or is later than the output time point.

Abstract: This invention provides an idler for use in conveyor systems and associated shaft and support structure that reduces the potential for infiltration of contaminants into the bearing assemblies at the opposing ends of the shaft. By use of stampings, co-molded polymer with sealed metal end caps, press-fit end shafts and stamped-metal support structures a more contamination-resistant and efficiently constructed idler assembly is provided. A hollow shaft center section can be used. The polymer defines at least three sealing structures. The shaft defines a multi-piece unit, with the end shafts press-fit onto the center shaft section and held in place by the bearing subassemblies—affixed to the idler sleeve. The support framework includes three stamped and/or cut, and folded sheet metal pieces—a center section with a pair of opposing central risers that engage end shafts, and two opposing, separately attached, end risers, that engage outermost idler end shafts.