Abstract: A clock signal source is described for providing three mutually independent clock signals to three processing sub-systems of a triplicated data processing system. The source comprises a master reference oscillator 10, a slave reference oscillator 12 phase locked to the master oscillator 10 and three mutually independent clock circuits 14a to 14c. Each of the clock phase circuits 14 is phase locked to the output signal of the reference oscillator 10 when it is functioning correctly, or to the slave reference oscillator 12 if a malfunction is detected in the master reference oscillator 10.