Abstract: Exemplary semiconductor device packaging structure and packaging method are provided. The packaging method uses an adhesive layer to bond multiple wafer pieces onto a first surface of a carrier substrate, each adjacent two of the wafer pieces having a gap formed therebetween for exposing a part of the adhesive layer. A packaging layer is filled in each of the gaps. At least one through silicon via is formed each of the wafer pieces to expose a bonding pad formed on an active surface of the wafer pieces. Redistribution circuit layers are formed on back surfaces of the respective wafer pieces and filled into the through silicon vias for electrical connection with the bonding pads. A sawing process is performed to saw starting from each of the packaging layers to a second surface of the carrier substrate, and thereby multiple semiconductor device packaging structures are obtained.

Abstract: An image sensing device includes an image sensing chip, an optical module and a protecting element. The image sensing chip has a front surface defining an image sensing region thereon. The optical module includes a barrel and at least one transparent element. The barrel is directly disposed on the front surface and around the image sensing region. The transparent element is disposed in the barrel and faces to the image sensing region. The protecting element covers an area of the front surface outside the optical module and surrounds the barrel. The image sensing device has a thin thickness.

Abstract: A semiconductor process includes the following steps. Firstly, a conductive substrate is provided. Then, at least one insulating pattern is formed on the conductive substrate. Thereafter at least one metal pattern is formed on the insulating pattern. After that, a passivation layer is formed on the conductive substrate to cover the metal pattern by an electroplating process.

Abstract: A semiconductor structure and a manufacturing method thereof are provided. The method includes the following steps. Firstly, a semiconductor substrate having an active surface and a back surface is provided. The active surface is opposite to the back surface, and the semiconductor substrate includes at least one grounding pad disposed on the active surface. Secondly, at least one through silicon via is formed through the semiconductor substrate from the back surface to the active surface thus exposing the grounding pad. Then, a conductive layer is formed on the back surface of the semiconductor substrate and filled into the through silicon via to electrically connect to the grounding pad and the semiconductor substrate.

Abstract: In a package process of backside illumination image sensor, a wafer including a plurality of pads is provided. A first carrier is processed to form a plurality of blind vias therein. The first carrier is adhered to the wafer so that the blind vias face to the pads correspondingly. A spacing layer is formed and a plurality of sensing components are disposed. A second carrier is adhered on the spacing layer. Subsequently, a carrier thinning process is performed so that the blind vias become the through holes. An insulating layer is formed on the first carrier. An electrically conductive layer is formed on the insulating layer and filled in the though holes to electrically connect to the pads. The package process can achieve the exact alignment of the through holes and the pads, thereby increasing the package efficiency and improving the package quality.

Abstract: A method for manufacturing semiconductor device includes the following steps. First, a carrier substrate and a plurality of pieced segments of wafer are provided. Each of the pieced segments of wafer has an active surface and a back surface on opposite sides thereof. Further, there is at least a bonding pad disposed on the active surface. Next, an adhering layer is formed between the carrier substrate and the active surfaces of the pieced segments of wafer, so as to make the pieced segments of wafer adhere to the carrier substrate. Next, a through silicon via is formed in each of the pieced segments of wafer to electrically connect to the bonding pad correspondingly. Then, the pieced segments of wafer are separated from the carrier substrate.

Abstract: Exemplary semiconductor device packaging structure and packaging method are provided. The packaging method uses an adhesive layer to bond multiple wafer pieces onto a first surface of a carrier substrate, each adjacent two of the wafer pieces having a gap formed therebetween for exposing a part of the adhesive layer. A packaging layer is filled in each of the gaps. At least one through silicon via is formed each of the wafer pieces to expose a bonding pad formed on an active surface of the wafer pieces. Redistribution circuit layers are formed on back surfaces of the respective wafer pieces and filled into the through silicon vias for electrical connection with the bonding pads. A sawing process is performed to saw starting from each of the packaging layers to a second surface of the carrier substrate, and thereby multiple semiconductor device packaging structures are obtained.

Abstract: A semiconductor structure and a manufacturing method thereof are provided. The method includes the following steps. Firstly, a semiconductor substrate having an active surface and a back surface is provided. The active surface is opposite to the back surface, and the semiconductor substrate includes at least one grounding pad disposed on the active surface. Secondly, at least one through silicon via is formed through the semiconductor substrate from the back surface to the active surface thus exposing the grounding pad. Then, a conductive layer is formed on the back surface of the semiconductor substrate and filled into the through silicon via to electrically connect to the grounding pad and the semiconductor substrate.