Patents Assigned to Infienon Technologies AG
  • Patent number: 6787801
    Abstract: Integrated circuits are tested on the wafer level through an additional circuit part that is electrically connected via at least one connecting line with the associated integrated circuit. The additional circuit part is integrated into an interspace between the integrated circuits of the wafer. Functions of the integrated circuit can be controlled via the connecting line. For example, in the case of a memory module such as a DRAM, internal voltages and/or currents of the integrated circuit can advantageously be measured even on internal lines which are otherwise only accessible with difficulty. Following the wafer-level testing and dicing of the integrated circuits into individual chips, the additional circuit part becomes unusable.
    Type: Grant
    Filed: September 19, 2002
    Date of Patent: September 7, 2004
    Assignee: Infienon Technologies AG
    Inventors: Helmut Fischer, Alan Morgan
  • Patent number: 6784650
    Abstract: A switching network with trimmable resistors lies in a control loop of a voltage generator that can be switched off from the supply voltage by a logic device. The logic device and also the switching network are driven by the same signals. The circuit configuration can be used for trimming or switching off the output voltage generated by the voltage generator during the functional test. As many settings as possible for the output voltage can be tested by a small number of control signals.
    Type: Grant
    Filed: May 14, 2003
    Date of Patent: August 31, 2004
    Assignee: Infienon Technologies AG
    Inventors: Thomas Hein, Patrick Heyne, Thilo Marx, Torsten Partsch
  • Patent number: 6768373
    Abstract: The invention provides a circuit configuration for demodulating a voltage that is ASK modulated by altering the amplitude between a low level and a high level. In this case, a first and a second charging circuit each produce a charging voltage and decoupling device decouples the first charging circuit when there is a prescribed ratio between the charging voltage of the second charging circuit and an input voltage for the rectifier circuit.
    Type: Grant
    Filed: October 6, 2003
    Date of Patent: July 27, 2004
    Assignee: Infienon Technologies AG
    Inventors: Mario Kupnik, Gebhard Melcher, Tobias Schlager, Walter Kargl, Ernst Neuhold
  • Patent number: 6765970
    Abstract: The invention relates to a method and an apparatus for preventing interference, particularly in telecommunications systems operating in burst mode, where the interference arises particularly when the signal has a signal level below a threshold level value and/or the signal has a constant amplitude over time. An artificial interference signal having at least one interference signal frequency is added in the processing path in the system so that the signal level exceeds the threshold level value or at least one amplitude that is constant over time is prevented.
    Type: Grant
    Filed: November 18, 2002
    Date of Patent: July 20, 2004
    Assignee: Infienon Technologies AG
    Inventor: Christian Kranz