Abstract: A method of forming an integrated circuit package, such as a Flip Chip package, in which a void is provided in the underfill material in the central region of the package between the chip or die and the substrate on which the chip or die is mounted. This reduces delamination of the package as a result of moisture.
Type:
Grant
Filed:
October 1, 2010
Date of Patent:
January 22, 2013
Assignee:
Infinenon Technologies AG
Inventors:
Gerald Ofner, Swain Hong Yeo, Mary Teo, Pei Siang Lim, Khoon Lam Chua