Patents Assigned to Infineon Technologes Austria AG
  • Method of manufacturing a vertical junction field effect transistor
    Patent number: 9666696
    Abstract: A method of manufacturing a vertical junction field effect transistor (JFET) includes forming a drain in a semiconductor substrate, forming a compound semiconductor epitaxial layer on the semiconductor substrate, and forming a source, a gate, a drift region, and a body diode all in the same compound semiconductor epitaxial layer. The drain is vertically spaced apart from the source and the gate by the drift region. The body diode is connected between the drain and the source.
    Type: Grant
    Filed: November 6, 2015
    Date of Patent: May 30, 2017
    Assignee: Infineon Technologes Austria AG
    Inventors: Romain Esteve, Cédric Ouvrard