Abstract: In some examples, a method includes measuring, by a secondary controller, an output voltage and determining, by the secondary controller, a duration for a ringing time based on the output voltage. In some examples, the method further includes delivering, by the secondary controller, a non-enabling control signal to a secondary switch during the ringing time and measuring, by a primary controller, a duration of the ringing time. In some examples, the method also includes determining, by the primary controller, a duration for a charging time based on the duration of the ringing time and delivering, by the primary controller, an enabling control signal to a primary switch during the charging time.

Abstract: A semiconductor device includes a transistor in a semiconductor substrate having a first main surface. The transistor includes a source region, a source contact, the source contact including a first and second source contact portion, and a gate electrode in a gate trench in the first main surface adjacent to a body region. The body region and a drift zone are disposed along a first direction parallel to the first main surface between the source region and a drain region. The second source contact portion is disposed at a second main surface of the semiconductor substrate. The first source contact portion includes a source conductive material in direct contact with the source region, the first source contact portion further including a portion of the semiconductor substrate between the source conductive material and the second source contact portion. The semiconductor device further includes a temperature sensor in the semiconductor substrate.

Abstract: An apparatus comprises an input interface for receiving a color image of at least an object and a low resolution depth image of at least the object. The apparatus further comprises an image processing module configured to produce data for generating a three-dimensional color image based on a first color pixel image data of a first color pixel and a first derived depth pixel image data of a first derived depth pixel. The image processing module is configured to calculate the first derived depth pixel image data based on a measured depth pixel image data of a measured depth pixel and a weighting factor. The weighting factor is based on a color edge magnitude summation value of a path between the first color pixel and the reference color pixel. The apparatus further comprises an output interface for providing the generated three-dimensional color image.

Abstract: A semiconductor device includes a first lead frame, a second lead frame, a first semiconductor chip, and an encapsulation material. The first lead frame includes a first die pad having a first surface and a second surface opposite to the first surface. The second lead frame includes a second die pad having a first surface and a second surface opposite to the first surface. The first surface of the second die pad faces the first surface of the first die pad. The first semiconductor chip is attached to the first surface of the first die pad. The encapsulation material encapsulates the first semiconductor chip and portions of the first lead frame and the second lead frame. The encapsulation material has a first surface aligned with the second surface of the first die pad and a second surface aligned with the second surface of the second die pad.

Abstract: A sensor module is provided that includes a magnetic sensor and a microcontroller. The magnetic sensor is configured to measure a magnitude of a magnetic field component of an Earth magnetic field projected on a sensing axis of the magnetic sensor and is configured to generate a measurement signal. The magnetic sensor is configured to rotate about an axis through the Earth magnetic field such that the measurement signal oscillates between a first and second extremas as the magnitude of the magnetic field component projected onto the sensing axis changes due to rotation of the magnetic sensor about the axis. The microcontroller is configured to receive the measurement signal, acquire a predetermined number of measurement samples over a sampling period, calculate a variance value of the acquired measurement samples, and determine whether the magnetic sensor is rotating about the axis based on a threshold test of the variance value.

Abstract: A sensor circuit includes a first magnetoresistor. The first magnetoresistor has a first resistance transfer function. Furthermore, the sensor circuit includes a second magnetoresistor. The second magnetoresistor has a second resistance transfer function. The second resistance transfer function is different from the first resistance transfer function. The first magnetoresistor and the second magnetoresistor are connected in series between a first supply terminal of the sensor circuit and a second supply terminal of the sensor circuit.

Abstract: A surface mountable microphone package comprises a first microphone and a second microphone. Furthermore, the surface mountable microphone package comprises a first opening for the first microphone and a second opening for the second microphone. The first opening and the second opening are arranged on opposite sides of the surface mountable microphone package.

Abstract: A semiconductor device includes trench gate structures in a semiconductor body with hexagonal crystal lattice. A mean surface plane of a first surface is tilted to a <1-100> crystal direction by an off-axis angle, wherein an absolute value of the off-axis angle is in a range from 2 degree to 12 degree. The trench gate structures extend oriented along the <1-100> crystal direction. Portions of the semiconductor body between neighboring trench gate structures form transistor mesas. Sidewalls of the transistor mesas deviate from a normal to the mean surface plane by not more than 5 degree.

Abstract: A semiconductor device includes a silicon substrate layer with a decoupling region. The decoupling region of the silicon substrate layer comprises an array of lamellas laterally spaced apart from each other by cavities. Each lamella of the array of lamellas comprises at least 20% silicon dioxide.

Abstract: A power semiconductor device is disclosed. In one example, the device includes a semiconductor body coupled to a first load terminal structure and a second load terminal structure. An active cell field is implemented in the semiconductor body. The active cell field is surrounded by an edge termination zone. A plurality of first cells and a plurality of second cells are provided in the active cell field. Each first cell includes a first mesa, the first mesa including: a first port region and a first channel region. Each second cell includes a second mesa, the second mesa including a second port region. The active cell field is surrounded by a drainage region that is arranged between the active cell field and the edge termination zone.

Abstract: According to an embodiment, a system includes a switching regulator and an electrochemical storage test circuit. The switching regulator is coupled to a power supply input and configured to supply a regulated voltage to a regulated supply terminal that is configured to be coupled to a device. The electrochemical storage test circuit is configured to be coupled to an electrochemical storage unit. The electrochemical storage test circuit includes a bidirectional switch with a first switch terminal coupled to the regulated supply terminal, a second switch terminal configured to be coupled to the electrochemical storage unit, and a switch control terminal. The electrochemical storage test circuit also includes a built-in self-test (BIST) circuit configured to be coupled to the electrochemical storage unit and to the switch control terminal.

Abstract: A voltage converter includes a power stage, a passive circuit, a synchronous rectification (SR) switch component, and a control circuit. The passive circuit couples the power stage to an output node of the voltage converter, and is switchably coupled to ground by the SR switch component. The SR switch component includes a plurality of SR switches, which are independently controllable. The control circuit determines which of the SR switches are to be activated/enabled, and only uses those SR switches in its variable switching of the voltage converter. The determination of which SR switches are to be activated/enabled is based upon an estimate of the output current for the voltage converter. By using more SR switches when the voltage converter is fully loaded, and fewer SR switches when it is lightly loaded, the power loss of the SR switch component is minimized and the voltage converter is more power efficient.

Abstract: In accordance with an embodiment, a circuit including: a gate driver coupled to a first supply terminal and to an output terminal, the output terminal configured to be coupled to a gate of a switching transistor via an inductive element, the gate driver configured to receive a switching signal; provide a first gate activation voltage at the output terminal with a first output resistance when the switching signal transitions from a first state to a second state; provide the first gate activation voltage at the output terminal with a second output resistance after a first time of providing the first gate activation voltage at the output terminal with the first output resistance, the second output resistance being larger than the first output resistance; and provide a first gate deactivation voltage at the output terminal when the switching signal transitions from the second state to the first state.

Abstract: A semiconductor device includes a semiconductor body having a front face, a back face and an active zone at the front face. A front surface metallization layer having a front face and a back face is disposed over the semiconductor body so that the back face of the front surface metallization layer faces the front face of the semiconductor body and is electrically connected to the active zone. An upper barrier layer made of amorphous molybdenum nitride is disposed on the front face of the front surface metallization layer.

Abstract: A circuit includes a differential input pair stage including bipolar transistors and configured to receive an RF input signal; a cascode stage coupled between the differential input pair stage and an output node, the cascode stage including bipolar transistors; and a current source including a first bipolar transistor coupled to a first output of the differential input pair stage and a second bipolar transistor coupled to a second output of the differential input pair stage.

Abstract: In accordance with an embodiment of the present invention, a semiconductor chip includes a device region disposed in or over a substrate, a doped region disposed in the device region, and a through via disposed in the substrate. The through via extends through the doped region.

Abstract: A multi-die package is manufactured by attaching a first semiconductor die made of a first semiconductor material to a thermally conductive flange via a first die attach material, and attaching a second semiconductor die to the same thermally conductive flange as the first semiconductor die via a second die attach material. The second semiconductor die is made of a second semiconductor material different than the first semiconductor material. The first semiconductor die is held in place by the first die attach material during attachment of the second semiconductor die to the flange. Leads are attached to the thermally conductive flange or to an insulating member secured to the flange. The leads provide external electrical access to the first and second semiconductor dies.

Abstract: A semiconductor device includes transistor cells and enhancement cells. Each transistor cell includes a body zone that forms a first pn junction with a drift structure. The transistor cells may form, in the body zones, inversion channels when a first control signal exceeds a first threshold. The inversion channels form part of a connection between the drift structure and a first load electrode. A delay unit generates a second control signal which trailing edge is delayed with respect to a trailing edge of the first control signal. The enhancement cells form inversion layers in the drift structure when the second control signal falls below a second threshold lower than the first threshold. The inversion layers are effective as minority charge carrier emitters.

Abstract: A first power transistor of a DC-DC converter is connected between a voltage supply node and a common node, a second power transistor is connected between a reference node and the common node, and an inductor is connected between the common node and the output node of the DC-DC converter. A controller switches the first transistor off and the second transistor off during a step-down event at the load if current in the inductor exceeds a positive threshold value.

Abstract: A circuit arrangement is provided, the circuit arrangement including a receiver configured to receive signal information from a sensor circuit; a discharge circuit configured to discharge a capacitance by providing a discharge pulse; and a modulation circuit configured to modulate a bit pattern onto the discharge pulse.