Abstract: Circuit arrangement for voltage regulation having a voltage divider and a regulating circuit. The voltage divider is arranged between a first potential and a reference-ground potential and has a plurality of diodes connected in series, wherein an output voltage is tapped off at a terminal of one of the diodes. The regulating circuit, to which the output voltage and a reference voltage are applied, regulates the first potential based on a comparison of the output voltage with the reference voltage. The divider ratio of the voltage divider is altered by activating or deactivating one or more of the diodes, and is additionally altered by setting a magnitude of a voltage drop across at least one of the diodes.

Abstract: A ferroelectric memory device includes a memory cell array having memory cells arranged in a matrix form. Each of the memory cells includes a cell transistor and a ferroelectric capacitor. It further includes a first dummy bit line arranged outside a bit line arranged on an end portion of the memory cell array and separated from the bit line arranged on the end portion of the memory cell array with an interval which is the same as a pitch between the bit lines in the memory cell array and having the same width as the bit line, and a first dummy memory cell connected to the first dummy bit line and having the same structure as the memory cell.

Abstract: A magnetic memory element is disclosed. The magnetic memory element includes a magnetic via for storing information, made of a magnetic material and being vertically oriented relative to a wafer surface on which the magnetic memory element is formed, the magnetic via having a magnetic anisotropy with its magnetization vector being magnetically coupled to at least one current line, and a magnetic sensor element comprising at least one magnetic layer having a magnetization vector being magnetically coupled to the magnetization vector of the magnetic via, wherein the magnetic sensor element being conductively connected to said at least one current line.

Abstract: A dummy capacitor drive potential VDC is given to one electrode of a dummy capacitor, and a reference potential for determining a data value of a memory cell is generated in the other electrode thereof. A potential generator circuit for generating the potential VDC is composed of a BGR circuit outputting a potential VBGRTEMP having temperature dependency, and resistors R3 and R4, which are series-connected between an output terminal of the BGR circuit and a ground point. The potential VDC is output from a connection point of the resistors R3 and R4. Temperature dependency of the potential VDC is adjusted based on a resistance ratio of resistors R1-1, R1-2 and R2, and the absolute value is adjusted based on a resistance ratio of resistors R3 and R4.

Abstract: A dual damascene structure and method of fabrication thereof. An insulating layer comprises a first dielectric material and a second dielectric material, the second dielectric material being different from the first dielectric material. First conductive regions having a first pattern are formed in the first dielectric material, and second conductive regions having a second pattern are formed in the second dielectric material, the second pattern being different from the first pattern. One of the first dielectric material and the second dielectric material comprises an organic material, and the other dielectric material comprises an inorganic material. One of the first and second dielectric materials is etchable selective to the other dielectric material. A method of cleaning a semiconductor wafer processing chamber while a wafer remains residing within the chamber is also disclosed.

Abstract: A bidirectional transmitting and receiving device includes a transmitting component with an emission area of a first size, and a receiving component with a receiving area of a second size. The device further includes coupling optics for coupling light between the transmitting component and the receiving component on the one hand, and an optical waveguide to be coupled thereto on the other hand. The coupling optics have two imaging systems that are arranged one behind the other such that the light that is emitted from the transmitting component is imaged by the first imaging system on an intermediate plane on which the receiving component is located, and in the process passes through the receiving component or passes by it at the side.

Abstract: A method for producing a capacitor comprises providing a raw structure having a substrate and at least one dielectric layer, wherein a first area and a second area of the substrate are separated by an isolating layer. Above the first and second areas, an electrically conductive layer is arranged on the at least one dielectric layer. Further, a mask layer is deposited on the electrically conductive layer, wherein it is structured for generating a first mask above the first area. The method further comprises etching away the electrically conductive layer and at least one of the dielectric layers in the second area by means of the first mask and completing an active device in the second area.

Abstract: The invention relates to a semiconductor device with a semiconductor chip and a rewiring layer, the semiconductor chip being embedded in a housing plastics composition by its rear side contact. The active top side of the semiconductor chip forms a coplanar overall top side with the top side of the housing plastics composition. The rear side contact is led to the overall top side via a flat conductor sheet tape, so that the rear side contact of the semiconductor chip can be accessed from the overall top side.

Abstract: A system for identifying objects with high reliability contains a transmitting part which is fitted to the respective object to be identified and can transmit a code radio frequency signal. The system further includes an activation part which can transmit an activation radio frequency signal to the transmitting part of a respective object which is moving past the activation part in order to cause the transmitting part to transmit the code radio frequency signal. The system also includes a receiving part which can receive the respective code radio frequency signa and a variation device which can vary the distance between successive objects and/or relative alignment between an electromagnetic field which is produced and the object moving past.

Abstract: A system and method for managing the communication rights of communication media groups such as audio, video, and text data streams, as well as the communication rights of a plurality of telecommunication devices participating in a telecommunication conference is provided. The communication rights of the telecommunication devices are managed in the course of the telecommunication conference taking into account the communication media group, using a control communication protocol for controlling a real-time data transmission communication protocol.

Abstract: The invention relates to a field effect controllable semiconductor component, comprising a semiconductor body with a first terminal zone and a second terminal zone, a channel zone formed between the two terminal zones, a control electrode, and also a plurality of compensation zones. The semiconductor component furthermore has additional doping zones which are arranged in spatial proximity to the compensation zones or in a manner merged therewith. The additional doping zones are connected to the first terminal zone, if appropriate via a series diode.

Abstract: A multithread processor for the data processing of a plurality of threads, each being provided with a dedicated context, comprises a switching table.

Abstract: The invention relates to a microprocessor device and to a branch prediction method that determines which of a plurality of predetermined branch classes a respective branch instruction to be executed is assigned to, and determines whether the branch is likely to be taken or not, depending on the branch class determined. Advantageously, a respective adaptive branch prediction device assigned to the determined branch class is used for determining whether the branch is likely to be taken or not.

Abstract: A method for verifying a data record having a plurality of data words, the method including the steps of providing an encrypted data record having a plurality of encrypted data words and an error codeword assigned to the data record. After the decryption of the encrypted data words, it is verified whether the error codeword is to be assigned to the decrypted data words. If the error codeword is not to be assigned, an alarm action is performed.

Abstract: The invention relates to a test arrangement for testing semiconductor circuit chips, in which a test signal received via a primary test channel from a driver amplifier of an item of test equipment is distributed via parallel sub-channels to a plurality of inputs of one or more semiconductor circuit chips under test the test arrangement having signal buffering circuits arranged in each sub-channel that receive and buffer the test signal from the driver amplifier before feeding it to the inputs of the semiconductor circuit chip(s).

Abstract: The program-controlled unit, during the execution of the program, can switch itself to a state in which selected elements that can be connected to form scan chains or all of the elements can no longer change their state, according to a predetermined result. If these elements are then connected to form a scan chain and read out, the data obtained as a result can be used to identify and/or analyze any errors existing in the program-controlled unit rapidly and reliably.

Abstract: In a method for fabricating trench capacitors, in particular for memory cells having at least one selection transistor for integrated semiconductor memories, a trench for the trench capacitor is formed. The trench has a lower trench region, in which the capacitor is disposed, and an upper trench region, in which an electrically conductive connection from an electrode of the capacitor to a diffusion zone of the selection transistor is disposed. The method reduces the number of process steps for the fabrication of memory cells and enables fabrication of buried collars in the storage capacitors with an insulation quality as required for the fabrication of very large-scale integrated memory cells (<300 nm trench diameter).

Abstract: The active layer (1) and the barrier layers (2) contain a group III component, a group V component and nitrogen, whereby the active layer is a quaternary material and the barrier layers are ternary materials, or, in order to match the lattice properties of the active layer to the barrier layers, the nitrogen content in the barrier layers is higher. The active layer is preferably InGaAsN, the barrier layers are InGaAsN with higher nitrogen content or GaAsN. Superlattices may exist in the barrier layers, for example, series of thin layers of InxGa1-xAsyN1-y with varying factors x and y, where, in particular, x=0 and y=1.

Abstract: A method for fabricating patterned ceramic layers on areas of a relief structure, wherein the layers may be arranged essentially perpendicular to a top side of a substrate. In exemplary embodiments, a patterned ceramic layer forms an oxide collar for a trench capacitor. The oxide collar is produced by a trench firstly being filled with a resist in its lower section, and an oxide layer subsequently being produced on the uncovered areas of the substrate with the aid of a low temperature ALD method. By means of anisotropic etching, only those portions of the ceramic layer which are arranged at the perpendicular walls of the trench remain. The resist filling may subsequently be removed, for example, by means of an oxygen plasma.

Abstract: In a method for controlling radio systems designed for transmission/reception of signals based on at least two radio standards with different time patterns, with signals based on one of these radio standards being processed in each radio system, at least one synchronization signal is produced in the first and/or second radio system for synchronization, respectively, is transmitted to the respective other radio system and system information associated with that particular radio system is in each case stored in that radio system to which the synchronization signal is transmitted. The stored system information can be read by the respective other radio system via an interface, and times for transmission of signals can be calculated by means of the information which has been read. The transmission of signals or the production of events in a radio system can be enabled or inhibited by means of a signal from the other radio systems.