Abstract: A panel according to an embodiment includes a translucent layer arrangement and a battery cell embedded at least partially into the translucent layer arrangement.
Type:
Grant
Filed:
December 13, 2013
Date of Patent:
January 7, 2020
Assignee:
Infineon Technoogies AG
Inventors:
Denis Lenardic, Katharina Schmut, Bernhard Goller
Abstract: A power semiconductor component including a semiconductor body and two load terminals is provided. Provided furthermore is a potential probe positioned to tap an electric intermediate potential of the semiconductor body at a tap location of the semiconductor body for an electric voltage applied across the two load terminals, the intermediate potential being intermediate to the electric potentials of the two load terminals, but differing from each of the two electric potentials of the two load terminals.