Patents Assigned to Infinera Corporation
  • Publication number: 20050286521
    Abstract: Client signals to be transported in a transmission network, particularly an optical transmission network, may have different payload envelope rates and are digitally mapped on the client egress side into first transport frames (also referred to as iDTF frames, or intra-node or internal digital transport frames), at the client side for intra-transport within terminal network elements (NEs) and further digitally mapped into second transport frames (also referred to as DTFs or digital transport frames) for inter-transport across the network or a link which, through byte stuffing carried out in the first transport frames so that they always have the same frame size. As a result, the system of framers provides for a DTF format to always have a uniformly universal frame rate throughout the network supporting any client signal frequency, whether a standard client payload or a proprietary client payload, as long as its rate is below payload envelope rate of the client signal.
    Type: Application
    Filed: June 16, 2005
    Publication date: December 29, 2005
    Applicant: Infinera Corporation
    Inventors: Ting-Kuang Chiang, Drew Perkins, Edward Sprague, Daniel Murphy
  • Publication number: 20050276613
    Abstract: A FEC enhanced system for an optical transport or communication network that includes an optical transmitter that has a transmitter photonic integrated circuit (TxPIC) chip having an integrated circuit comprising an array of modulated sources providing a plurality of optical modulated channel signals comprising digital bit data streams where each signal is at a wavelength on a wavelength grid. The modulated channel signal outputs from the modulated sources are provided to an integrated multiplexer in the circuit to provide a WDM output signal at a circuit output. At least one FEC encoder is coupled to the modulated sources to encode error-correcting code containing redundant information of the data bit stream for each channel signal. An optical receiver in the network includes a receiver photonic integrated circuit (RxPIC) chip having an integrated circuit comprising an input to a demultiplexer and an array of photodetectors coupled to outputs of the demultiplexer.
    Type: Application
    Filed: May 24, 2005
    Publication date: December 15, 2005
    Applicant: Infinera Corporation
    Inventors: David Welch, Fred Kish, Vincent Dominic, Ting-Kuang Chiang
  • Publication number: 20050249509
    Abstract: A coolerless photonic integrated circuit (PIC), such as a semiconductor electro-absorption modulator/laser (EML) or a coolerless optical transmitter photonic integrated circuit (TxPIC), may be operated over a wide temperature range at temperatures higher then room temperature without the need for ambient cooling or hermetic packaging. Since there is large scale integration of N optical transmission signal WDM channels on a TxPIC chip, a new DWDM system approach with novel sensing schemes and adaptive algorithms provides intelligent control of the PIC to optimize its performance and to allow optical transmitter and receiver modules in DWDM systems to operate uncooled. Moreover, the wavelength grid of the on-chip channel laser sources may thermally float within a WDM wavelength band where the individual emission wavelengths of the laser sources are not fixed to wavelength peaks along a standardized wavelength grid but rather may move about with changes in ambient temperature.
    Type: Application
    Filed: April 14, 2005
    Publication date: November 10, 2005
    Applicant: Infinera Corporation
    Inventors: Radhakrishnan Nagarajan, Fred Kish,, David Welch, Drew Perkins, Masaki Kato
  • Publication number: 20050213883
    Abstract: A method is disclosed for optimizing optical channel signal demultiplexing in a monolithic receiver photonic integrated circuit (RXPIC) chip by providing an integrated channel signal demultiplexing with multiple waveguide input verniers provided to an WDM signal demultiplexer. The RxPIC chip may optionally include an integrated amplifier in at least some of the waveguide input verniers. The RxPIC chip may be comprised of, in monolithic form, a plurality of optional semiconductor optical amplifiers (SOAs) at the input of the chip to receive a WDM signal from an optical link which is provided along a plurality of waveguide input verniers to an integrated optical demultiplexer, such as, but not limited to, an arrayed waveguide grating (AWG), as a WDM signal demultiplexer. Thus, optical outputs from the respective semiconductor laser amplifiers are provided as vernier inputs to the optical demultiplexer forming a plurality of input verniers at the input to the optical demultiplexer.
    Type: Application
    Filed: May 24, 2005
    Publication date: September 29, 2005
    Applicant: Infinera Corporation
    Inventors: David Welch, Radhakrishnan Nagarajan, Fred Kish, Mark Missey, Vincent Dominic, Atul Mathur, Frank Peters, Charles Joyner
  • Publication number: 20050207696
    Abstract: An optical-to-electrical-to-optical converter comprises a monolithic receiver photonic integrated circuit (RxPIC) InP-based chip comprising an optical waveguide formed in the chip from a chip input to receive a first multiplexed channel signal from an optical link and provide them to an arrayed waveguide grating (AWG) which demultiplexes the multiplexed channel signals and provides a plurality of electrical channel signals to an electronic regenerator. The regenerator regenerates the electrical channel signals to an original signal waveform and provides the reformed electrical signals to a monolithic transmitter photonic integrated circuit (TxPIC) InP-based chip having an array of modulated sources formed in the chip that are coupled as inputs to an arrayed waveguide grating (AWG). The TxPIC modulates the reformed electrical signals to form a plurality of optical channel sign which are combined to form a second first multiplexed channel signal for transmission on an optical link.
    Type: Application
    Filed: May 5, 2005
    Publication date: September 22, 2005
    Applicant: Infinera Corporation
    Inventors: David Welch, Radhakrishnan Nagarajan, Fred Kish, Mark Missey, Vincent Dominic, Atul Mathur, Frank Peters, Charles Joyner, Richard Schneider, Ting-Kuang Chiang
  • Publication number: 20050201669
    Abstract: An optical transport network comprises a monolithic transmitter photonic integrated circuit (TxPIC) InP-based chip and a monolithic receiver photonic integrated circuit (RxPIC) InP-based chip.
    Type: Application
    Filed: May 5, 2005
    Publication date: September 15, 2005
    Applicant: Infinera Corporation
    Inventors: David Welch, Radhakrishnan Nagarajan, Fred Kish, Mark Missey, Vincent Dominic, Atul Mathur, Frank Peters, Charles Joyner, Richard Schneider, Ting-Kuang Chiang
  • Publication number: 20050169640
    Abstract: An optical communication module comprises at least one monolithic semiconductor transmitter photonic integrated circuit chip having a plurality of optical signal channels approximating wavelengths on a standardized grid. Each of said channels comprises a laser source optically coupled to an electro-optic modulator. The outputs of the electro-optic modulators are coupled to inputs of an integrated optical combiner for combining the inputs to form a combined signal output from the chip. A booster optical amplifier is optically coupled to receive and amplify the combined signal output from the chip.
    Type: Application
    Filed: March 15, 2005
    Publication date: August 4, 2005
    Applicant: Infinera Corporation
    Inventors: Stephen Grubb, Matthew Mitchell, Robert Taylor, Ting-Kuang Chiang, Vincent Dominic
  • Publication number: 20050151144
    Abstract: In photonic integrated circuits (PICs) having at least one active semiconductor device, such as, a buried heterostructure semiconductor laser, LED, modulator, photodiode, heterojunction bipolar transistor, field effect transistor or other active device, a plurality of semiconductor layers are formed on a substrate with one of the layers being an active region. A current channel is formed through this active region defined by current blocking layers formed on adjacent sides of a designated active region channel where the blocking layers substantially confine the current through the channel. The blocking layers are characterized by being an aluminum-containing Group Ill-V compound, i.e., an Al-III-V layer, intentionally doped with oxygen from an oxide source. Also, wet oxide process or a deposited oxide source may be used to laterally form a native oxide of the Al-III-V layer.
    Type: Application
    Filed: February 16, 2005
    Publication date: July 14, 2005
    Applicant: Infinera Corporation
    Inventors: Fred Kish, Sheila Hurtt, Charles Joyner, Richard Schneider
  • Publication number: 20050145863
    Abstract: In photonic integrated circuits (PICs) having at least one active semiconductor device, such as, a buried heterostructure semiconductor laser, LED, modulator, photodiode, heterojunction bipolar transistor, field effect transistor or other active device, a plurality of semiconductor layers are formed on a substrate with one of the layers being an active region. A current channel is formed through this active region defined by current blocking layers formed on adjacent sides of a designated active region channel where the blocking layers substantially confine the current through the channel. The blocking layers are characterized by being an aluminum-containing Group III-V compound, i.e., an Al-III-V layer, intentionally doped with oxygen from an oxide source. Also, wet oxide process or a deposited oxide source may be used to laterally form a native oxide of the Al-III-V layer.
    Type: Application
    Filed: February 16, 2005
    Publication date: July 7, 2005
    Applicant: Infinera Corporation
    Inventors: Fred Kish, Sheila Hurtt, Charles Joyner, Richard Schneider
  • Publication number: 20050135730
    Abstract: A method is disclosed for monitoring and controlling the bit error rate (BER) in an optical communication network where an optical receiver in the optical transmission network is a monolithic photonic integrated circuit (RxPIC) chip. The method includes the steps of decombining on-chip a combined channel signal received from the network and then monitoring a real time bit error rate (BER) of a decombined channel signal. The determined BER is then communicated, such as through an optical service channel (OSC) to an optical transmitter source that is the source of origin of the channel signal. Based upon the determined BER, the chirp of a channel signal modulator at the optical transmitter source that generated the monitored channel signal is adjusted by, for example, adjusting its bias. The same channel signal received at the RxPIC chip can be monitored again to determine if an acceptable level for the BER has been achieved by the previous chirp adjustment.
    Type: Application
    Filed: January 7, 2005
    Publication date: June 23, 2005
    Applicant: Infinera Corporation
    Inventors: David Welch, Radhakrishnan Nagarajan, Fred Kish, Mark Missey, Vincent Dominic, Atul Mathur, Frank Peters, Charles Joyner, Richard Schneider, Ting-Kuang Chiang
  • Publication number: 20050135778
    Abstract: A wider window margin in an eye diagram for an optical transmission signal is provided for both threshold and phase (timing).
    Type: Application
    Filed: January 10, 2005
    Publication date: June 23, 2005
    Applicant: Infinera Corporation
    Inventors: Vincent Dominic, Ting-Kuang Chiang
  • Publication number: 20050135731
    Abstract: An optical receiver photonic integrated circuit (RxPIC) system includes a monolithic semiconductor chip having an input to receive a WDM combined channel signal comprising a plurality of optical channel signals of different wavelengths. A chip-integrated decombiner is coupled to the chip input to receive the WDM combined channel signal and separate the same into a plurality of different channel signals having different wavelengths. An array of integrated photodetectors, also integrated on the chip, each receive a separated channel signal and together provide a plurality of electrical signals representative of the optical channel signals. An electronic amplifier receives and amplifies the electrical signals. An electronic dispersion equalization (EDE) circuit is coupled to receive and adjust the amplified electrical signals for timing errors due to imperfect clock recovery of said electrical signals. An clock and data recover (CDR) circuit recovers a signal clock and data signals from the electrical signals.
    Type: Application
    Filed: January 10, 2005
    Publication date: June 23, 2005
    Applicant: Infinera Corporation
    Inventors: David Welch, Vincent Dominic, Ting-Kuang Chiang
  • Publication number: 20050129350
    Abstract: An optical transmitter photonic integrated circuit (TxPIC) comprises a semiconductor monolithic chip with a plurality of optical signal channels where each channel comprises a modulated signal source. The output from the modulated signal sources are coupled to an input of an integrated optical combiner to form a WDM output signal for transmission off the TxPIC chip to an optical transmission link. An optical service channel (OSC) is also integrated on the TxPIC chip to receive a service signal from the optical receiver source which is also coupled the optical transmission link.
    Type: Application
    Filed: January 7, 2005
    Publication date: June 16, 2005
    Applicant: Infinera Corporation
    Inventors: David Welch, Radhakrishnan Nagarajan, Fred Kish, Vincent Dominic, Ting-Kuang Chiang
  • Publication number: 20050117834
    Abstract: A photonic integrated circuit (PIC) comprises a plurality of integrated optically coupled components formed in a surface of the PIC and a passivating layer overlies at least a portion of the PIC surface. The overlying passivating layer comprises a material selected from the group consisting of BCB, ZnS and ZnSe. Also, when the circuits are PIC chips are die in the semiconductor wafer, a plurality of linear cleave streets are formed in a wafer passivation layer where a pattern of the cleave streets define separate PIC chips in the wafer for their subsequent singulation from the wafer.
    Type: Application
    Filed: December 21, 2004
    Publication date: June 2, 2005
    Applicant: Infinera Corporation
    Inventors: Charles Joyner, Mark Missey, Radhakrishnan Nagarajan, Fred Kish
  • Publication number: 20050111780
    Abstract: A method for reducing insertion loss in a transition region between a plurality of input or output waveguides to a free space coupler region in a photonic integrated circuit (PIC) includes the steps of forming a passivation layer over the waveguides and region and forming the passivation overlayer such that it monotonically increases in thickness through the transition region to the free space coupler region.
    Type: Application
    Filed: December 21, 2004
    Publication date: May 26, 2005
    Applicant: Infinera Corporation
    Inventors: Charles Joyner, Mark Missey, Radhakrishnan Nagarajan, Fred Kish
  • Publication number: 20050111779
    Abstract: Disclosed is a method of in-wafer testing of integrated optical components and in-wafer chips with photonic integrated circuits (PICs).
    Type: Application
    Filed: December 16, 2004
    Publication date: May 26, 2005
    Applicant: Infinera Corporation
    Inventors: Charles Joyner, Mark Missey, Radhakrishnan Nagarajan, Frank Peters, Mehrdad Ziari, Fred Kish
  • Publication number: 20050105843
    Abstract: Disclosed is a method of in-wafer testing of integrated optical components and in-wafer chips with photonic integrated circuits (PICs).
    Type: Application
    Filed: December 16, 2004
    Publication date: May 19, 2005
    Applicant: Infinera Corporation
    Inventors: Charles Joyner, Frank Peters
  • Publication number: 20050100279
    Abstract: An optical waveguide device, power coupler, a star coupler, a MMI coupler, an arrayed waveguide grating (AWG) or an Echelle grating, having at least one free space region with a plurality of optical waveguides coupled as inputs and separated by channels having a angled bottom portion, the channels monotonically decreasing in size or shape in a direction toward the free space region and optically coupling with adjacent waveguides at the interface region between the optical waveguides and the free space region so that insertion loss at the interface region is substantially reduced.
    Type: Application
    Filed: December 21, 2004
    Publication date: May 12, 2005
    Applicant: Infinera Corporation
    Inventors: Charles Joyner, Mark Missey, Fred Kish
  • Publication number: 20050100300
    Abstract: A method for forming and apparatus comprising a free space coupler region having a plurality of optical waveguides coupled to the space coupler region at an interface region, the waveguides converging with one another to the interface region, and a trench formed between adjacent waveguides, the depth of the trench or trenches extending from an outer point to the interface region and monotonically decreasing in depth from the outer point to the interface region.
    Type: Application
    Filed: December 21, 2004
    Publication date: May 12, 2005
    Applicant: Infinera Corporation
    Inventors: Charles Joyner, Mark Missey, Radhakrishnan Nagarajan, Frank Peters, Mehrdad Ziari, Fred Kish
  • Publication number: 20050100278
    Abstract: An arrayed waveguide grating (AWG) comprises at least two free space regions, a plurality of grating arms extending between the two space regions, a passivation layer formed over the arrayed waveguide grating and a plurality of inputs at least to one of the free space regions to receive a plurality of channel signals separated by a predetermined channel spacing. A depth of the passivation layer chosen by providing a TE to TM wavelength shift between TE and TM modes propagating through the arrayed waveguide grating being approximately less than or equal to 20% of a magnitude of the channel spacing.
    Type: Application
    Filed: December 17, 2004
    Publication date: May 12, 2005
    Applicant: Infinera Corporation
    Inventors: Charles Joyner, Mark Missey, Radhakrishnan Nagarajan, Fred Kish