Abstract: A device for making a 16-bit data bus microprocessor compatible with peripherals, expansion devices and associated software designed for an 8-bit data bus. The 16-bit data bus is divided into high and low portions, the low portion of which is coupled to the 8-bit data bus by a buffer which is disabled or enabled. The high portion is selectively coupled to the 8-bit data bus when a high data byte is to be transferred either during 8-bit byte operation or in word operations. The device may be bypassed when 16-bit data bus expansion devices or peripherals are used.