Abstract: A testing method including the following steps is provided. A lead frame is provided, wherein the lead frame includes a frame body and a plurality of lead frame units which are connected with each other through the frame body and are arranged in array. Each of the lead frame units includes at least one first pin connected with the frame body and a plurality of second pins which are connected with each other. A plurality of controllers are bonded with the lead frame units and each of the controllers is electrically connected with the corresponding lead frame unit. The frame body of each of the lead frame units is electrically isolated from the second pins. A first electrical testing is performed to each of the lead frame units carrying the controllers.

Abstract: A carrier array adapted for carrying a plurality of chips is provided. The carrier array includes a lead frame, controllers and first packages. The lead frame includes a frame body and a plurality of lead frame units. The lead frame units are connected with each other through the frame body and arranged in an array. Each of the lead frame units includes at least one first pin connected with the frame body and a plurality of second pins not connected with the frame body. The controllers are disposed on the lead frame units, and electrically connected with the corresponding lead frame units, respectively. Each of the first packages is disposed on the lead frame, and respectively has an opening to expose a portion region of the corresponding lead frame unit, and the openings are adapted for accommodating the chips. A light emitting diode package is also provided.